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ADM1186

更新时间: 2024-11-29 04:31:19
品牌 Logo 应用领域
亚德诺 - ADI 监控
页数 文件大小 规格书
28页 446K
描述
Quad Voltage Up and Down Sequencer and Monitor with Programmable Timing

ADM1186 数据手册

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Quad Voltage Up and Down Sequencer  
and Monitor with Programmable Timing  
ADM1186  
FEATURES  
GENERAL DESCRIPTION  
Powered from 2.7 V to 5.5 V on the VCC pin  
The ADM1186-1 and ADM1186-2 are integrated, four-channel  
Monitors four supplies via 0.8% accurate comparators  
Digital core supports up and down supply sequencing  
Multiple devices can be cascaded (ADM1186-1)  
Four inputs can be programmed to monitor different voltage  
levels with resistor dividers  
Capacitor programmable supply sequence time delays  
and a timeout delay to 5% accuracy at 25°C  
Four open-drain enable outputs  
voltage monitoring and sequencing devices. A 2.7 V to 5.5 V  
power supply is required on the VCC pin for power.  
Four precision comparators, VIN1 to VIN4, monitor four  
voltage rails. All four comparators share a 0.6 V reference and  
have a worst-case accuracy of 0.8%. Resistor networks that are  
external to the VIN1, VIN2, VIN3, and VIN4 pins set the  
undervoltage (UV) trip points for the monitored supply rails.  
The ADM1186-1 and ADM1186-2 have four open-drain enable  
outputs, OUT1 to OUT4, that are used to enable power supplies.  
An open-drain power-good output, PWRGD, indicates whether  
the four VINx inputs are above their UV thresholds.  
Open-drain power-good output  
Open-drain sequence complete pin and bidirectional  
open-drain fault pin (ADM1186-1 only)  
APPLICATIONS  
DOWN  
A state machine monitors the state of the UP and  
pins  
Monitor and alarm functions  
DOWN  
on the ADM1186-1 or the UP/  
pin on the ADM1186-2  
Up and down power supply sequencing  
Telecommunication and data communication equipment  
PCs, servers, and notebook PCs  
to control the supply sequencing direction (see Figure 2). In the  
WAIT START state, a rising edge transition on the UP or  
DOWN  
UP/  
transition on the  
DONE state triggers a power-down sequence.  
pin triggers a power-up sequence. A falling edge  
DOWN DOWN  
or UP/  
pin in the POWER-UP  
APPLICATION DIAGRAM  
5V  
5V  
IN  
ADP1706  
2.5V  
1.8V  
EN  
OUT  
5V  
5V  
IN  
ADP2107  
EN  
OUT  
3.3V AUX  
3.3V AUX  
IN  
3.3V AUX  
1µF  
ADP1821  
1.2V  
3.3V  
EN  
OUT  
5V  
5V  
IN  
ADP1706  
100nF  
EN  
OUT  
3.3V AUX  
VCC  
OUT1  
OUT2  
OUT3  
OUT4  
FAULT  
VIN1  
VIN2  
VIN3  
VIN4  
UP  
SEQUENCE CONTROL  
DOWN  
ADM1186-1  
DLY_EN_OUT1  
DLY_EN_OUT2  
DLY_EN_OUT3  
DLY_EN_OUT4  
BLANK_DLY  
2.5V AUX  
3.3V AUX  
PWRGD  
SEQ_DONE  
GND  
Figure 1.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2008 Analog Devices, Inc. All rights reserved.  
 
 

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