Microwave Wideband Synthesizer with
Integrated VCO
Data Sheet
ADF5610
power supplies for the PLL circuitry range from 3.1 V to 3.5 V,
and the VCO supplies are between 4.75 V and 5.25 V. The
charge pump supply voltage can be extended up to 3.6 V for
improved frequency band overlap and extended upper
frequency range.
FEATURES
RF output frequency range: 57 MHz to 14,600 MHz
RFOUT: 7300 MHz to 14,600 MHz
PDIV/NDIV: 57 MHz to 14,600 MHz
Fractional-N synthesizer and Integer N synthesizer modes
24-bit fractional modulus
Exact frequency mode for 0 Hz frequency error
Typical PFD spurious: <−105 dBc
The ADF5610 has an integrated VCO with a fundamental
frequency of 3650 MHz to 7300 MHz. These frequencies are
internally doubled and routed to the RFOUT pin. An additional
differential output allows the doubled VCO frequency to be
divided by 1, 2, 4, 8, 16, 32, 64, or 128, allowing the user to
generate RF output frequencies as low as 57 MHz. A simple
3-wire serial port interface (SPI) provides control of all on-chip
registers. To conserve power, this divider block can be disabled
when not needed through the SPI interface. Likewise, the output
power for both the single-ended output and the differential
output are programmable via the VCO register settings. The
ADF5610 also contains various power-down modes for the
VCO circuitry and PLL circuitry.
Integrated rms jitter: <40 fs
Normalized inband phase noise floor FOM
High current mode: −232 dBc/Hz (integer) and −229 dBc/Hz
(fractional)
Normal mode: −229 dBc/Hz (integer) and −226 dBc/Hz
(fractional)
Maintains frequency lock over −40°C to +85°C (lock and leave)
Low phase noise VCO
−115 dBc/Hz typical at 100 kHz (7.3 GHz)
−114 dBc/Hz typical at 100 kHz (10 GHz)
−109 dBc/Hz typical at 100 kHz (14.6 GHz)
RFOUT power: 5 dBm
The integrated phase detector (PD) and delta-sigma (Δ-Σ)
modulator, capable of operating at up to 100 MHz, permit wide
loop bandwidths and fast frequency tuning with a typical
spurious level of −100 dBc.
Programmable divide by 1, 2, 4, 8, 16, 32, 64, or 128 output
Programmable output power level
Typical power dissipation: 815 mW
With phase noise levels from −115 dBc/Hz at 7.3 GHz to
−109 dBc/Hz at 14.6 GHz, the ADF5610 is equipped to
minimize blocker effects, and to improve receiver sensitivity
and transmitter spectral purity. The low phase noise floor
eliminates any contribution to modulator and mixer noise floor
in transmitter applications.
Programmable low current and power dissipation: <700 mW
Fast frequency hopping (autocalibration enabled): <40 µs
48-terminal, 7 mm × 7 mm LGA package: 49 mm2
APPLICATIONS
Military and defense
Test equipment
Clock generation
Wireless infrastructure
Satellite and very small aperture terminal (VSAT)
Microwave radio
The ADF5610 is a PLL with integrated VCO. The device features
an innovative programmable performance technology that
enables the ADF5610 to tailor current consumption and
corresponding noise performance to individual applications by
selecting either a low current consumption mode or a high
performance mode for improved phase noise performance.
GENERAL DESCRIPTION
The ADF5610 allows implementation of fractional-N or Integer N
phase-locked loop (PLL) frequency synthesizers when used
with an external loop filter and an external reference source.
The wideband microwave voltage controlled oscillator (VCO)
design permits frequency operation from 7300 MHz to
Additional features of the ADF5610 include approximately 3 dB
of RFOUT gain control in 1.5 dB steps and 5 dB of control on the
differential port in approximately 2.5 dB steps. Finally, the Δ-Σ
modulator with exact frequency mode enables users to generate
output frequencies with 0 Hz frequency error.
14600 MHz at a single radio frequency (RF) output. A series of
frequency dividers with a differential frequency output allows
operation from 57 MHz to 14600 MHz. Analog and digital
Rev. 0
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