ADF41513
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Register 2 (R2) Map ................................................................... 18
Register 3 (R3) Map ................................................................... 18
Register 4 (R4) Map ................................................................... 19
Register 5 (R5) Map ................................................................... 19
Register 6 (R6) Map ................................................................... 21
Register 7 (R7) Map ................................................................... 23
Register 8 (R8) Map ................................................................... 24
Register 9 (R9) Map ................................................................... 24
Register 10 (R10) Map............................................................... 25
Register 11 (R11) Map............................................................... 25
Register 12 (R12) Map............................................................... 26
Register 13 (R13) Map............................................................... 27
Applications information .............................................................. 28
Initialization Sequence .............................................................. 28
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Characteristics ................................................................ 5
Absolute Maximum Ratings............................................................ 6
Thermal Resistance ...................................................................... 6
ESD Caution.................................................................................. 6
Pin Configuration and Function Description .............................. 7
Typical Performance Characteristics ............................................. 9
Theory of Operation ...................................................................... 11
Reference Input........................................................................... 11
RF Input Stage............................................................................. 11
N Divider and R Counter .......................................................... 11
R Counter .................................................................................... 12
PFD and Charge Pump.............................................................. 12
MUXOUT.................................................................................... 12
Lock Detector.............................................................................. 12
Readback...................................................................................... 13
Input Shift Registers................................................................... 13
Program Modes .......................................................................... 13
Register Maps.................................................................................. 14
Register 0 (R0) Map ................................................................... 17
Register 1 (R1) Map ................................................................... 17
RF Synthesizer: A Worked Example of 25-Bit Fixed Modulus
Mode ............................................................................................ 28
RF Synthesizer: A Worked Example of Variable Modulus
Mode ............................................................................................ 28
Modulus....................................................................................... 28
Reference Doubler and Reference Divider ............................. 28
Spur Mechanisms ....................................................................... 29
Phase Resync............................................................................... 29
Outline Dimensions....................................................................... 30
Ordering Guide .......................................................................... 30
REVISION HISTORY
1/2019—Revision 0: Initial Version
Rev. 0 | Page 2 of 30
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