ADF4150HV
TABLE OF CONTENTS
Features .............................................................................................. 1
Register 1 ..................................................................................... 17
Register 2 ..................................................................................... 17
Register 3 ..................................................................................... 19
Register 4 ..................................................................................... 19
Register 5 ..................................................................................... 19
Register Initialization Sequence ............................................... 19
RF Synthesizer—A Worked Example ...................................... 20
Reference Doubler and Reference Divider ............................. 20
12-Bit Programmable Modulus................................................ 20
Spurious Optimization and Boost Mode ................................ 21
Spur Mechanisms ....................................................................... 21
Spur Consistency and Fractional Spur Optimization ........... 21
Phase Resync............................................................................... 22
Applications Information.............................................................. 23
Ultrawideband PLL.................................................................... 23
Microwave PLL........................................................................... 23
Generating the High Voltage Supply ....................................... 24
Interfacing to the ADuC702x and the ADSP-BF527............. 25
PCB Design Guidelines for a Chip Scale Package ................. 25
Output Matching........................................................................ 26
Outline Dimensions....................................................................... 27
Ordering Guide .......................................................................... 27
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Characteristics ................................................................ 5
Absolute Maximum Ratings............................................................ 6
Transistor Count........................................................................... 6
Thermal Resistance ...................................................................... 6
ESD Caution.................................................................................. 6
Pin Configuration and Function Descriptions............................. 7
Typical Performance Characteristics ............................................. 9
Circuit Description......................................................................... 11
Reference Input Section............................................................. 11
RF N Divider............................................................................... 11
Phase Frequency Detector (PFD) and High Voltage
Charge Pump .............................................................................. 11
MUXOUT and Lock Detect...................................................... 12
Input Shift Registers................................................................... 12
Program Modes .......................................................................... 12
Output Stage................................................................................ 12
Register Maps.................................................................................. 13
Register 0 ..................................................................................... 17
REVISION HISTORY
8/11—Revision 0: Initial Version
Rev. 0 | Page 2 of 28