14-Channel, High-Voltage Data-
Acquisition Systems
ADES1754/ADES1755/ADES1756
(V
= +56V, T = T
to T
unless otherwise noted, where T
= -40°C and T
= +105°C. Typical values are at T = +25°C.
MAX A
DCIN
A
MIN
MAX
MIN
Operation is with the recommend application circuit. (Note 5))
PARAMETER
UART TIMING
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Baud rate = 2Mbps; Note 14
Baud rate = 1Mbps; Note 14
Baud rate = 0.5Mbps; Note 14
8
1/f
OSC_1
6M
t
Bit Period
16
32
BIT
Rx Idle to START Setup
Time
t
t
Note 8
Note 8
0
1
1
RXSTSU
BIT
t
t
STOP Hold Time to Idle
0.5
SPHD
BIT
Rx Minimum Idle Time
(STOP Bit to START
Bit)
t
t
Note 8
RXIDLESPST
BIT
t
t
Rx Fall Time
Rx Rise Time
Note 8, Note 15
Note 8, Note 15
0.5
0.5
FALL
BIT
t
t
RISE
BIT
Propagation Delay (Rx
Port to Tx Port)
Start-Up Time from
t
t
2.5
1
3
PROP
BIT
SHNDL High and V
=
AA
t
ms
STARTUP
0V to RXUP/RXUN
Valid
I2C
0.3V
DDI
V
V
V
≤ V
≤ V
≤ 5.5V
≤ 5.5V
Input Voltage Low
V
V
IL
DDL2/3
DDL2/3
DDIO
DDIO
O
0.7V
DDI
V
Input Voltage High
IH
O
V
Input Voltage Hysteresis
Input Leakage Current
Input Capacitance
0.15
+0.1
10
V
μA
pF
V
HYST
I
IN
-1.0
+1.0
C
IN
V
I
= 3mA
Output Voltage Low
0.4
400
100
OL
SINK
400kHz mode (I2CFSCL = 1)
100kHz mode (I2CFSCL = 0)
400kHz mode (I2CFSCL = 1)
0
0
f
SCL Clock Frequency
kHz
SCL
Hold Time for a
(Repeated) START
Condition
0.6
t
μs
HD;STA
100kHz mode (I2CFSCL = 0)
4.0
400kHz mode (I2CFSCL = 1)
100kHz mode (I2CFSCL = 0)
400kHz mode (I2CFSCL = 1)
100kHz mode (I2CFSCL = 0)
400kHz mode (I2CFSCL = 1)
1.3
4.7
0.6
4.0
0.6
t
SCL Pulse Width Low
SCL Pulse Width High
μs
μs
LOW
t
HIGH
Set-up Time for a
Repeated START
Condition
t
μs
SU;STA
100kHz mode (I2CFSCL = 0)
4.7
Note 18
0
t
Data Hold Time
Data Setup Time
www.analog.com
ns
HD;DAT
Controller transmitting data
300
Controller receiving data, and 400kHz
mode (I2CFSCL = 1) bus monitor check
Controller receiving data, and 100kHz
mode (I2CFSCL = 0) bus monitor check
100
t
ns
SU;DAT
250
300
Controller transmitting data
Analog Devices | 10