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ADC1003S030TS PDF预览

ADC1003S030TS

更新时间: 2024-10-02 12:50:39
品牌 Logo 应用领域
艾迪悌 - IDT 调节器
页数 文件大小 规格书
19页 481K
描述
Single 10 bits ADC, up to 30 MHz, 40 MHz or 50 MHz, with voltage regulator

ADC1003S030TS 技术参数

生命周期:Obsolete包装说明:SSOP, SOP28,.30,26
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.78最大模拟输入电压:2 V
最小模拟输入电压:-2 V转换器类型:ADC, RESISTANCE LADDER
JESD-30 代码:R-PDSO-G28长度:10.2 mm
最大线性误差 (EL):0.1953%模拟输入通道数量:1
位数:10功能数量:1
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C输出位码:BINARY, 2'S COMPLEMENT BINARY
输出格式:PARALLEL, WORD封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SOP28,.30,26
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
采样速率:30 MHz采样并保持/跟踪并保持:SAMPLE
座面最大高度:2 mm最大压摆率:35 mA
标称供电电压:5 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:5.3 mmBase Number Matches:1

ADC1003S030TS 数据手册

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ADC1003S030/040/050  
Single 10 bits ADC, up to 30 MHz, 40 MHz or 50 MHz, with  
voltage regulator  
Rev. 03 — 2 July 2012  
Product data sheet  
1. General description  
The ADC1003S030/040/050 are a family of 10-bit high-speed low-power Analog-to-Digital  
Converters (ADC) for professional video and other applications. They convert the analog  
input signal into 10-bit binary-coded digital words at a maximum sampling rate of 50 MHz.  
All digital inputs and outputs are Transistor-Transistor Logic (TTL) and CMOS compatible,  
although a low-level sine wave clock input signal is allowed.  
The device includes an internal voltage reference regulator. If the application requires that  
the reference is driven via external sources the recommendation is to use one of the  
ADC1004S030/040/050 family.  
2. Features  
10-bit resolution  
Sampling rate up to 50 MHz  
DC sampling allowed  
One clock cycle conversion only  
High signal-to-noise ratio over a large analog input frequency range  
(9.3 effective bits at 4.43 MHz full-scale input at fclk = 40 MHz)  
No missing codes guaranteed  
In-Range (IR) CMOS output  
Levels TTL and CMOS compatible digital inputs  
3 V to 5 V CMOS digital outputs  
Low-level AC clock input signal allowed  
Internal reference voltage regulator  
Power dissipation only 235 mW (typical)  
Low analog input capacitance, no buffer amplifier required  
No sample-and-hold circuit required  
3. Applications  
High-speed analog-to-digital conversion for:  
Video data digitizing  
Radar  
Transient signal analysis  
Global Positioning System (GPS) receiver  
 modulators  
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