ADC10040

更新时间： 2024-10-01 22:39:03

品牌	Logo	应用领域
美国国家半导体 - NSC		转换器
页数	文件大小	规格书
19页	911K
描述
10-Bit, 40 MSPS, 3V, 55.5 mW A/D Converter

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中文翻译

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ADC10040 数据手册

November 2004

ADC10040

10-Bit, 40 MSPS, 3V, 55.5 mW A/D Converter

General Description

Features

n Single +3.0V operation

The ADC10040 is a monolithic CMOS analog-to-digital con-

verter capable of converting analog input signals into 10-bit

digital words at 40 Megasamples per second (MSPS). This

converter uses a differential, pipeline architecture with digital

error correction and an on-chip sample-and-hold circuit to

provide a complete conversion solution, and to minimize

power consumption, while providing excellent dynamic per-

formance. A unique sample-and-hold stage yields a full-

power bandwidth of 400 MHz. Operating on a single 3.0V

power supply, this device consumes just 55.5 mW at

40 MSPS, including the reference current. The Standby

feature reduces power consumption to just 13.5 mW.

n Selectable 2.0 V_P-P, 1.5 V_P-P, or 1.0 V_P-Pfull-scale input

swing

n 400 MHz −3 dB input bandwidth

n Low power consumption

n Standby mode

n On-chip reference and sample-and-hold amplifier

n Offset binary or two’s complement data format

n Separate adjustable output driver supply to

accommodate 2.5V and 3.3V logic families

n 28-pin TSSOP package

The differential inputs provide a full scale selectable input

swing of 2.0 V_P-P, 1.5 V_P-P, 1.0 V_P-P, with the possibility of a

single-ended input. Full use of the differential input is recom-

mended for optimum performance. An internal +1.2V preci-

sion bandgap reference is used to set the ADC full-scale

range, and also allows the user to supply a buffered refer-

enced voltage for those applications requiring increased ac-

curacy. The output data format is 10-bit offset binary, or two’s

complement.

Key Specifications

n Resolution

10 Bits

40 MSPS

400 MHz

n Conversion Rate

n Full Power Bandwidth

n DNL

n SNR (f_IN= 11 MHz)

n SFDR (f_IN= 11 MHz)

n Data Latency

0.3 LSB (typ)

59.6 dB (typ)

−80 dB (typ)

6 Clock Cycles

+3.0V

This device is available in the 28-lead TSSOP package and

will operate over the industrial temperature range of −40˚C to

+85˚C.

n Supply Voltage

n Power Consumption, 40 MHz

55.5 mW

Applications

n Ultrasound and Imaging

n Instrumentation

n Cellular Based Stations/Communications Receivers

n Sonar/Radar

n xDSL

n Wireless Local Loops

n Data Acquisition Systems

n DSP Front Ends

Connection Diagram

20077801

DS200778

www.national.com

12 3 4 5 6 7...19

中文翻译

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与ADC10040相关器件

型号	品牌	获取价格	描述	数据表
ADC10040_14	TI	获取价格	ADC10040/ADC10040Q 10-Bit, 40 MSPS, 3V, 55.5 mW A/D Converter
ADC10040CIMT	NSC	获取价格	10-Bit, 40 MSPS, 3V, 55.5 mW A/D Converter
ADC10040CIMT	TI	获取价格	ADC10040/ADC10040Q 10-Bit, 40 MSPS, 3V, 55.5 mW A/D Converter
ADC10040CIMT/NOPB	NSC	获取价格	IC 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28, TSSOP-28, Analog to Digita
ADC10040CIMT/NOPB	TI	获取价格	55.5 mW A/D Converter
ADC10040CIMTX	NSC	获取价格	10-Bit, 40 MSPS, 3V, 55.5 mW A/D Converter
ADC10040CIMTX	TI	获取价格	ADC10040/ADC10040Q 10-Bit, 40 MSPS, 3V, 55.5 mW A/D Converter
ADC10040CIMTX/NOPB	TI	获取价格	10 位、40MSPS 模数转换器 (ADC) \| PW \| 28 \| -40 to 85
ADC10040-Q1	TI	获取价格	10 位 40MSPS 数模转换器 (ADC) - 符合汽车应用标准
ADC10040QCIMT	NSC	获取价格	IC 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28, TSSOP-28, Analog to Digita

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