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ADC10040CIMT PDF预览

ADC10040CIMT

更新时间: 2024-10-01 22:39:03
品牌 Logo 应用领域
美国国家半导体 - NSC 转换器
页数 文件大小 规格书
19页 911K
描述
10-Bit, 40 MSPS, 3V, 55.5 mW A/D Converter

ADC10040CIMT 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:TSSOP-28Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.25最大模拟输入电压:1.5 V
最小模拟输入电压:0.5 V转换器类型:ADC, PROPRIETARY METHOD
JESD-30 代码:R-PDSO-G28JESD-609代码:e0
长度:9.7 mm最大线性误差 (EL):0.0977%
湿度敏感等级:3模拟输入通道数量:1
位数:10功能数量:1
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C输出位码:OFFSET BINARY, 2'S COMPLEMENT BINARY
输出格式:PARALLEL, WORD封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP28,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):235电源:2.5,3 V
认证状态:Not Qualified采样速率:40 MHz
采样并保持/跟踪并保持:SAMPLE座面最大高度:1.1 mm
子类别:Analog to Digital Converters标称供电电压:3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mm

ADC10040CIMT 数据手册

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November 2004  
ADC10040  
10-Bit, 40 MSPS, 3V, 55.5 mW A/D Converter  
General Description  
Features  
n Single +3.0V operation  
The ADC10040 is a monolithic CMOS analog-to-digital con-  
verter capable of converting analog input signals into 10-bit  
digital words at 40 Megasamples per second (MSPS). This  
converter uses a differential, pipeline architecture with digital  
error correction and an on-chip sample-and-hold circuit to  
provide a complete conversion solution, and to minimize  
power consumption, while providing excellent dynamic per-  
formance. A unique sample-and-hold stage yields a full-  
power bandwidth of 400 MHz. Operating on a single 3.0V  
power supply, this device consumes just 55.5 mW at  
40 MSPS, including the reference current. The Standby  
feature reduces power consumption to just 13.5 mW.  
n Selectable 2.0 VP-P, 1.5 VP-P, or 1.0 VP-P full-scale input  
swing  
n 400 MHz −3 dB input bandwidth  
n Low power consumption  
n Standby mode  
n On-chip reference and sample-and-hold amplifier  
n Offset binary or two’s complement data format  
n Separate adjustable output driver supply to  
accommodate 2.5V and 3.3V logic families  
n 28-pin TSSOP package  
The differential inputs provide a full scale selectable input  
swing of 2.0 VP-P, 1.5 VP-P, 1.0 VP-P, with the possibility of a  
single-ended input. Full use of the differential input is recom-  
mended for optimum performance. An internal +1.2V preci-  
sion bandgap reference is used to set the ADC full-scale  
range, and also allows the user to supply a buffered refer-  
enced voltage for those applications requiring increased ac-  
curacy. The output data format is 10-bit offset binary, or two’s  
complement.  
Key Specifications  
n Resolution  
10 Bits  
40 MSPS  
400 MHz  
n Conversion Rate  
n Full Power Bandwidth  
n DNL  
n SNR (fIN = 11 MHz)  
n SFDR (fIN = 11 MHz)  
n Data Latency  
0.3 LSB (typ)  
59.6 dB (typ)  
−80 dB (typ)  
6 Clock Cycles  
+3.0V  
This device is available in the 28-lead TSSOP package and  
will operate over the industrial temperature range of −40˚C to  
+85˚C.  
n Supply Voltage  
n Power Consumption, 40 MHz  
55.5 mW  
Applications  
n Ultrasound and Imaging  
n Instrumentation  
n Cellular Based Stations/Communications Receivers  
n Sonar/Radar  
n xDSL  
n Wireless Local Loops  
n Data Acquisition Systems  
n DSP Front Ends  
Connection Diagram  
20077801  
© 2004 National Semiconductor Corporation  
DS200778  
www.national.com  

ADC10040CIMT 替代型号

型号 品牌 替代类型 描述 数据表
ADC10040QCIMT/NOPB TI

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