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ADC0848CCV/NOPB PDF预览

ADC0848CCV/NOPB

更新时间： 2024-11-15 13:05:27
品牌 Logo 应用领域
美国国家半导体 - NSC 转换器
页数 文件大小 规格书
20页 470K
描述
IC 8-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PQCC28, PLASTIC, LCC-28, Analog to Digital Converter

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中文翻译

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ADC0848CCV/NOPB 技术参数

是否Rohs认证：符合生命周期：Transferred
包装说明：QCCJ, LDCC28,.5SQReach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.12Is Samacsys：N
最大模拟输入电压：5 V最小模拟输入电压：
最长转换时间：60 µs转换器类型：ADC, SUCCESSIVE APPROXIMATION
JESD-30 代码：S-PQCC-J28JESD-609代码：e3
长度：11.43 mm最大线性误差 (EL)：0.3906%
湿度敏感等级：2A模拟输入通道数量：8
位数：8功能数量：1
端子数量：28最高工作温度：85 °C
最低工作温度：-40 °C输出位码：BINARY
输出格式：PARALLEL, 8 BITS封装主体材料：PLASTIC/EPOXY
封装代码：QCCJ封装等效代码：LDCC28,.5SQ
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：245电源：5 V
认证状态：Not Qualified采样速率：0.033 MHz
座面最大高度：4.57 mm子类别：Analog to Digital Converters
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：11.43 mm
Base Number Matches：1

ADC0848CCV/NOPB 数据手册

 浏览型号ADC0848CCV/NOPB的Datasheet PDF文件第2页浏览型号ADC0848CCV/NOPB的Datasheet PDF文件第3页浏览型号ADC0848CCV/NOPB的Datasheet PDF文件第4页浏览型号ADC0848CCV/NOPB的Datasheet PDF文件第5页浏览型号ADC0848CCV/NOPB的Datasheet PDF文件第6页浏览型号ADC0848CCV/NOPB的Datasheet PDF文件第7页 
June 1999  
ADC0844/ADC0848  
8-Bit µP Compatible A/D Converters with Multiplexer  
Options  
General Description  
Features  
n Easy interface to all microprocessors  
n Operates ratiometrically or with 5 VDC  
voltage reference  
The ADC0844 and ADC0848 are CMOS 8-bit successive ap-  
proximation A/D converters with versatile analog input multi-  
plexers. The 4-channel or 8-channel multiplexers can be  
software configured for single-ended, differential or  
pseudo-differential modes of operation.  
n No zero or full-scale adjust required  
n 4-channel or 8-channel multiplexer with address logic  
n Internal clock  
n 0V to 5V input range with single 5V power supply  
n 0.3" standard width 20-pin or 24-pin DIP  
n 28 Pin Molded Chip Carrier Package  
The differential mode provides low frequency input common  
mode rejection and allows offsetting the analog range of the  
converter. In addition, the A/D’s reference can be adjusted  
enabling the conversion of reduced analog ranges with 8-bit  
resolution.  
The A/Ds are designed to operate from the control bus of a  
wide variety of microprocessors. TRI-STATE® output latches  
that directly drive the data bus permit the A/Ds to be config-  
ured as memory locations or I/O devices to the microproces-  
sor with no interface logic necessary.  
Key Specifications  
n Resolution  
8 Bits  
LSB and 1 LSB  
1
±
±
n Total Unadjusted Error  
n Single Supply  
n Low Power  
⁄
2
5 VDC  
15 mW  
40 µs  
n Conversion Time  
Block and Connection Diagrams  
DS005016-1  
*ADC0848 shown in DIP Package CH5-CH8 not included on the ADC0844  
TRI-STATE® is a registered trademark of National Semiconductor Corp.  
© 1999 National Semiconductor Corporation  
DS005016  
www.national.com  
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