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ADA4945-1CP-EBZ PDF预览

ADA4945-1CP-EBZ

更新时间: 2022-02-26 10:59:43
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
44页 1219K
描述
High Speed Offset Drift Fully Differential ADC Driver

ADA4945-1CP-EBZ 数据手册

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ADA4945-1  
Data Sheet  
For an unbalanced single-ended input signal, as shown in  
Figure 104, the input impedance is  
IMPACT OF MISMATCHES IN THE FEEDBACK  
NETWORKS  
Even if the external feedback networks (RF/RG) are mismatched,  
the internal common-mode feedback loop still forces the outputs  
to remain balanced. The amplitudes of the signals at each output  
remain equal and 180° out of phase. The input-to-output,  
differential mode gain varies proportionately to the feedback  
mismatch, but the output balance is unaffected.  
β1+ β2  
β1(β2 +1)  
R
IN,SE = RG1  
where:  
RG1  
R
G1 + RF1  
β1 =  
As well as causing a noise contribution from VOCM, ratio matching  
errors in the external resistors result in a degradation of the ability  
of the circuit to reject input common-mode signals, similar to a  
four resistors difference amplifier made from a conventional  
op amp.  
RG2  
RG2 + RF2  
β2 =  
R
F1  
+V  
R
S
In addition, if the dc levels of the input and output common-  
mode voltages are different, matching errors result in a small  
differential mode, output offset voltage. When G = 1, with a  
ground referenced input signal and the output common-mode  
level set to 2.5 V, an output offset of as much as 25 mV (1% of  
the difference in common-mode levels) can result if 1% tolerance  
resistors are used. Resistors of 1% tolerance result in a worst  
case input CMRR of about 40 dB, a worst case differential mode  
output offset of 25 mV due to the 2.5 V level shift, and no  
significant degradation in output balance error.  
IN, SE  
R
G1  
V
OCM  
ADA4945-1  
R
V
OUT, dm  
L
R
G2  
–V  
S
R
F2  
Figure 104. ADA4945-1 with Unbalanced (Single-Ended) Input  
For a balanced system where RG1 = RG2 = RG and RF1 = RF2 = RF,  
the equations simplify to  
CALCULATING THE INPUT IMPEDANCE OF AN  
APPLICATION CIRCUIT  
The effective input impedance depends on whether the signal  
source is single-ended or differential. For a balanced differential  
RG  
RG  
RF  
2(RG + RF )  
β1 = β2 =  
and RIN,SE =  
RG + RF  
input signal, as shown in Figure 103, the input impedance (RIN, dm  
)
1−  
between the inputs (+DIN and −DIN) is RIN, dm = 2 × RG.  
R
F
The input impedance of the circuit is effectively higher than it  
would be for a conventional op amp connected as an inverter  
because a fraction of the differential output voltage appears at  
the inputs as a common-mode signal, partially bootstrapping  
the voltage across the RG1 input resistor.  
ADA4945-1  
+V  
S
R
R
G
G
+IN  
+D  
–D  
IN  
V
OCM  
V
OUT, dm  
IN  
–IN  
R
F
Figure 103. ADA4945-1 Configured for Balanced (Differential) Inputs  
Rev. 0 | Page 38 of 44  
 
 
 
 

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