AD9882A
SPECIFICATIONS
VD = 3.3 V, VDD = 3.3 V, ADC clock = maximum conversion rate, unless otherwise noted.
Table 1. Analog Interface Electrical Characteristics
AD9882AKSTZ-100
AD9882AKSTZ-140
Parameter
Temp
Test Level
Min
Typ
Max
Min
Typ
Max
Unit
RESOLUTION
8
8
Bits
DC ACCURACY
Differential Nonlinearity
25°C
Full
25°C
Full
I
VI
I
VI
VI
0.5 +1.25/–1.0
+1.35/–1.0
0.5 +1.35/–1.0
+1.45/–1.0
LSB
LSB
LSB
LSB
Integral Nonlinearity
0.5
1.85
2.0
0.5
2.0
2.3
No Missing Codes
ANALOG INPUT
Input Voltage Range
Minimum
Maximum
Gain Tempco
Input Bias Current
Input Full-Scale Matching
Offset Adjustment Range
REFERENCE OUTPUT
Output Voltage
Temperature Coefficient
SWITCHING PERFORMANCE1
Maximum Conversion Rate
Minimum Conversion Rate
Clock to Data Skew, tSKEW
Serial Port Timing
tBUFF
Full
Guaranteed
Guaranteed
Full
Full
25°C
Full
Full
Full
VI
VI
V
IV
VI
VI
0.5
0.5
V p-p
V p-p
ppm/°C
µA
% FS
% FS
1.0
45
1.0
45
100
100
1
1
1.5
49
8.0
56
1.5
49
8.0
56
Full
Full
VI
V
1.25
50
1.25
50
V
ppm/°C
Full
Full
Full
VI
IV
IV
100
140
MSPS
MSPS
ns
10
+2.0
10
+2.0
–0.5
–0.5
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
25°C
Full
Full
VI
VI
VI
VI
VI
VI
VI
VI
IV
VI
IV
IV
IV
IV
4.7
4.0
250
4.7
4.0
250
4.7
4.0
15
4.7
4.0
250
4.7
4.0
250
4.7
4.0
15
µs
µs
ns
µs
µs
ns
µs
µs
kHz
MHz
MHz
ps p-p
ps p-p
ps/°C
tSTAH
tDHO
tDAL
tDAH
tDSU
tSTASU
tSTOSU
Hsync Input Frequency
Maximum PLL Clock Rate
Minimum PLL Clock Rate
PLL Jitter
110
110
12
100
140
12
7002
1000
500
15
700
2
500
15
2
2
1000
Sampling Phase Tempco
DIGITAL INPUTS
Input Voltage, High (VIH)
Input Voltage, Low (VIL)
Input Current, High (IIH)
Input Current, Low (IIL)
Input Capacitance
Full
Full
Full
Full
25°C
VI
VI
IV
IV
V
2.6
2.6
V
V
µA
µA
pF
0.8
–1.0
1.0
0.8
–1.0
1.0
3
3
1
DIGITAL OUTPUTS
Output Voltage, High (VOH)
Output Voltage, Low (VOL)
Duty Cycle, DATACK
Full
Full
Full
IV
IV
IV
VDD – 0.1
45
VDD – 0.1
45
V
V
%
0.4
55
0.4
55
50
50
Rev. 0 | Page 3 of 40