AD9882A
TABLE OF CONTENTS
Specifications............................................................................................3
Absolute Maximum Ratings ..................................................................6
Explanation of Test Levels..................................................................6
ESD Caution ........................................................................................6
Pin Configuration and Function Descriptions....................................7
Special Characters .............................................................................20
Channel Resynchronization.............................................................20
Data Decoder.....................................................................................20
HDCP..................................................................................................20
General Timing Diagrams: Digital Interface.................................22
Timing Mode Diagrams: Digital Interface ....................................22
2-Wire Serial Register Map ..................................................................23
2-Wire Serial Control Register Detail.................................................26
Chip Identification............................................................................26
PLL Divider Control .........................................................................26
Clamp Timing....................................................................................27
Hsync Output Pulse Width..............................................................27
Input Gain ..........................................................................................27
Input Offset ........................................................................................27
2-Wire Serial Control Port...............................................................32
Sync Processing Engine ........................................................................35
Sync Slicer...........................................................................................35
Sync Separator ...................................................................................35
PCB Layout Recommendations...........................................................36
Analog Interface Inputs....................................................................36
Digital Interface Inputs.....................................................................36
Power Supply Bypassing ...................................................................36
PLL ......................................................................................................37
Outputs: Data and Clocks ................................................................37
Digital Inputs .....................................................................................37
Voltage Reference ..............................................................................37
Outline Dimensions ..............................................................................38
Ordering Guide..................................................................................38
Pin Descriptions of Shared Pins between Analog and Digital
Interfaces ..............................................................................................8
Serial Port (2-Wire) ............................................................................8
Data Outputs........................................................................................8
Pin Function Detail: Analog Interface .............................................9
Power Supply .....................................................................................10
Theory of Operation: Interface Detection .........................................12
Active Interface Detection and Selection.......................................12
Power Management ..........................................................................12
Theory of Operation and Design Guide: Analog Interface.............13
General Description..........................................................................13
Input Signal Handling ......................................................................13
Hsync and Vsync Inputs ..................................................................13
Serial Control Port............................................................................13
Output Signal Handling ...................................................................13
Clamping............................................................................................13
Gain and Offset Control...................................................................14
Sync-on-Green (SOG)......................................................................15
Clock Generation..............................................................................15
Timing: Analog Interface .....................................................................17
Timing Diagrams ..............................................................................18
Theory of Operation: Digital Interface...............................................19
Digital Interface Pin Descriptions ..................................................19
Capturing the Encoded Data...........................................................20
Data Frames .......................................................................................20
REVISION HISTORY
10/04—Revision 0: Initial Version
Rev. 0 | Page 2 of 40
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