Datasheet > AD9857_17

AD9857_17

更新时间： 2022-02-26 12:47:31

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
41页	893K
描述
CMOS 200 MSPS 14-Bit Quadrature Digital Upconverter

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AD9857_17 数据手册

AD9857

Supply Voltage

Equivalent I/O Circuits

This affects power dissipation and junction temperature

because power dissipation equals supply voltage multiplied by

supply current. It is recommended that the user design for a

3.3 V nominal supply voltage in order to manage the effect of

supply voltage on the junction temperature of the AD9857.

DIGITAL

OUT

DIGITAL

Clock Speed

IOUT IOUTB

DAC OUTPUTS

This directly and linearly influences the total power dissipation

of the device and, therefore, junction temperature. As a rule, the

user should always select the lowest internal clock speed

possible to support a given application to minimize power

dissipation. Typically, the usable frequency output bandwidth

from a DDS is limited to 40% of the system clock rate to keep

reasonable requirements on the output low-pass filter. This

means that for the typical DDS application, the system clock

frequency should be 2.5 times the highest output frequency.

Figure 35. Equivalent I/O Circuits

SUPPORT

Applications assistance is available for the AD9857 and the

AD9857/PCB evaluation board. Please call 1-800-ANALOGD

or visit www.analog.com/dds.

Operating Modes

The AD9857 has three operating modes that consume

significantly different amounts of power. When operating in

the quadrature modulation mode, the AD9857 dissipates about

twice the power as when operating as a single-tone DDS. When

operating as a quadrature modulator, the AD9857 has features

that facilitate power management tactics. For example, the

TxENABLE pin may be used in conjunction with the auto

power-down bit to frame bursts of data and automatically

switch the device into a low power state when there is no data to

be modulated.

Rev. C| Page 35 of 40

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