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AD9778BSVZRL

更新时间: 2024-11-30 21:21:47
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
34页 915K
描述
Dual 14-Bit, 1 GSPS, Digital-to-Analog Converter

AD9778BSVZRL 数据手册

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Dual 14-Bit, 1.0 GSPS  
D/A Converter  
AD9778  
Preliminary Technical Data  
DAC that provides a sample rate of 1 GSPS, permitting multi  
carrier generation up to its Nyquist frequency. It includes features  
optimized for direct conversion transmit applications, including  
complex digital modulation and gain and offset compensation. The  
DAC outputs are optimized to interface seamlessly with analog  
quadrature modulators such as the AD8349. A serial peripheral  
interface (SPI) provides for programming many internal  
FEATURES  
1.8/3.3 V Single Supply Operation  
Low power: 560 mW (IOUTFS = 20 mA; fDAC = 1 GSPS, 4×  
Interpolation  
DNL = TBD LSB, INL = TBD LSB  
SFDR = TBD dBc to fOUT = 100 MHz  
ACLR = 84 dBc @ 80 MHz IF  
parameters and also enables read-back of status registers. The  
output current can be programmed over a range of 10mA to 30mA.  
The AD9778 is manufactured on an advanced 0.18µm CMOS  
process and operates from 1.8V and 3.3V supplies for a total power  
consumption of 325mW. It is supplied in a 100-lead QFP package.  
CMOS data interface with Autotracking Input Timing  
Analog Output: Adjustable 10-30mA (RL=25 to 50 )  
100-lead Exposed Paddle TQFP Package  
Multiple Chip Synchronization Interface  
84dB Digital Interpolation Filter Stopband Attenuation  
Digital Inverse Sinc Filter  
PRODUCT HIGHLIGHTS  
Ultra-low Noise and Intermodulation Distortion (IMD) enable  
high quality synthesis of wideband signals from baseband to high  
intermediate frequencies.  
APPLICATIONS  
Wireless Infrastructure  
Direct Conversion  
Single-ended CMOS interface supports a maximum input rate of  
300 MSPS with 1x interpolation.  
Transmit Diversity  
Wideband Communications Systems:  
Point-to-Point Wireless, LMDS  
Manufactured on a CMOS process, the AD9778 uses a proprietary  
switching technique that enhances dynamic performance.  
PRODUCT DESCRIPTION  
The current outputs of the AD9778 can be easily configured for  
various single-ended or differential circuit topologies.  
The AD9778 is a dual 14-bit high performance, high frequency  
FUNCTIONAL BLOCK DIAGRAM  
Delay Line  
Delay Line  
SYNC_O  
SYNC_I  
Clock Generation/Distribution  
DATACLK_OUT  
Clock  
CLK+  
Multiplier  
CLK-  
2X/4X/8X  
Data  
Assembler  
IOUT1_P  
IOUT1_N  
Sinc-1  
16-Bit  
IDAC  
P1D[13:0]  
P2D[13:0]  
I Latch  
2X  
2X  
2X  
2X  
2X  
n * Fdac/8  
n = 1, 2, 3… 7  
Complex  
Modulator  
IOUT2_P  
IOUT2_N  
Q Latch  
2X  
16-Bit  
QDAC  
Sinc-1  
Digital Controller  
10  
10  
Gain  
Gain  
VREF  
RSET  
Reference  
& Bias  
Serial  
Peripheral  
Interface  
Power-On  
Reset  
10  
10  
AUX1_P  
AUX1_N  
AUX2_P  
AUX2_N  
Offset  
Offset  
Figure 1 Functional Block Diagram  
Rev. PrA  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2005 Analog Devices, Inc. All rights reserved.  

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