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AD9739BBCZ

更新时间: 2024-02-02 01:21:10
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
48页 856K
描述
14-Bit, 2.5 GSPS, RF Digital-to-Analog Converter

AD9739BBCZ 数据手册

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14-Bit, 2.5 GSPS,  
RF Digital-to-Analog Converter  
AD9739  
Data Sheet  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Direct RF synthesis at 2.5 GSPS update rate  
DC to 1.25 GHz in baseband mode  
RESET  
IRQ  
1.25 GHz to 3.0 GHz in mix mode  
Industry leading single/multicarrier IF or RF synthesis  
AD9739  
1.2V  
SDIO  
SDO  
CS  
SPI  
DAC BIAS  
fOUT = 350 MHz, ACLR =80 dBc  
fOUT = 950 MHz, ACLR = 78 dBc  
fOUT = 2100 MHz, ACLR = 69 dBc  
VREF  
I120  
SCLK  
Dual-port LVDS data interface  
Up to 1.25 GSPS operation  
Source synchronous DDR clocking  
Pin-compatible with the AD9739A  
Multichip synchronization capability  
Programmable output current: 8.7 mA to 31.7 mA  
Low power: 1.16 W at 2.5 GSPS  
IOUTP  
IOUTN  
TxDAC  
CORE  
DCI  
APPLICATIONS  
CLK DISTRIBUTION  
(DIV-BY-4)  
Broadband communications systems  
Military jammers  
Instrumentation, automatic test equipment  
Radar, avionics  
DCO  
SYNC_OUT  
SYNC_IN  
SYNC-  
CONTROLLER  
DACCLK  
Figure 1.  
GENERAL DESCRIPTION  
The AD9739 is a 14-bit, 2.5 GSPS high performance RF digital-  
to-analog converter (DAC) capable of synthesizing wideband  
signals from dc up to 3.0 GHz. Its DAC core features a quad-  
switch architecture that provides exceptionally low distortion  
performance with an industry-leading direct RF synthesis  
capability. This feature enables multicarrier generation up to  
the Nyquist frequency in baseband mode as well as second and  
third Nyquist zones in mix mode. The output current can be  
programmed over the 8.66 mA to 31.66 mA range.  
PRODUCT HIGHLIGHTS  
1. Ability to synthesize high quality wideband signals with  
bandwidths of up to 1.25 GHz in the first or second  
Nyquist zone.  
2. A proprietary quad-switch DAC architecture provides  
exceptional ac linearity performance while enabling mix  
mode operation.  
3. A dual-port, double data rate, LVDS interface supports the  
maximum conversion rate of 2500 MSPS.  
4. On-chip controllers manage external and internal clock  
domain skews.  
5. A multichip synchronization capability.  
6. Programmable differential current output with a 8.66 mA  
to 31.66 mA range.  
The inclusion of on-chip controllers simplifies system integration.  
A dual-port, source synchronous, LVDS interface simplifies the  
digital interface with existing FGPA/ASIC technology. On-chip  
controllers are used to manage external and internal clock domain  
variations over temperature to ensure reliable data transfer from  
the host to the DAC core. Multichip synchronization is possible  
with an on-chip synchronization controller. A serial peripheral  
interface (SPI) is used for device configuration as well as readback  
of status registers.  
The AD9739 is manufactured on a 0.18 μm CMOS process and  
operates from 1.8 V and 3.3 V supplies. It is supplied in a 160-ball  
chip scale ball grid array for reduced package parasitics.  
Rev. B  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
www.analog.com  
Fax: 781.461.3113 ©2009–2012 Analog Devices, Inc. All rights reserved.  
 

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