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AD9680-500EBZ PDF预览

AD9680-500EBZ

更新时间: 2022-02-26 09:14:31
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亚德诺 - ADI /
页数 文件大小 规格书
99页 3113K
描述
Dual Analog-to-Digital Converter

AD9680-500EBZ 数据手册

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Data Sheet  
AD9680  
REVISION HISTORY  
Changes to Specifications Section and Table 1 .............................5  
Changes to AC Specifications Section and Table 2.......................6  
Changes to Digital Specifications Section .....................................8  
Changes to Switching Specifications Section and Table 4 ...........9  
Changes to Table 6, Thermal Characteristics Section, and  
Table 7...............................................................................................11  
Change to Digital Inputs Description, Table 8............................13  
Added AD9680-1000 Section, Figure 10, and Figure 11;  
Renumbered Sequentially ..............................................................14  
Changes to Figure 6 to Figure 9 ....................................................14  
Added Figure 12 to Figure 14........................................................15  
Changes to Figure 15 to Figure 17 ................................................15  
Changes to Figure 18 to Figure 21 ................................................16  
Changes to Figure 25 and Figure 29 .............................................17  
Changes to Figure 30 ......................................................................18  
Deleted Figure 35, Figure 36, and Figure 38................................19  
Added AD9680-500 Section and Figure 31 to Figure 54 .............19  
Changes to Analog Input Considerations Section and  
11/15—Rev. B to Rev. C  
Added AD9680-1250......................................................... Universal  
Changes to Features Section ............................................................1  
Change to General Description Section.........................................4  
Changes to Table 1 ............................................................................5  
Changes to Table 2 ............................................................................6  
Changes to Table 4 ............................................................................9  
Changes to Table 5 ..........................................................................10  
Changes to Figure 4.........................................................................11  
Changes to Pin 14 Description, Table 8 .......................................14  
Added AD9680-1250 Section and Figure 6 to Figure 29;  
Renumbered Sequentially ..............................................................15  
Changes to Figure 113 ....................................................................34  
Changes to Analog Input Considerations Section......................35  
Changes to Table 9 ..........................................................................36  
Changes to Input Buffer Control Registers (0x018, 0x019,  
0x01A, 0x935, 0x934, 0x11A) Section..........................................37  
Added Figure 118 to Figure 120....................................................37  
Changes to Table 10 ........................................................................40  
Changes to Table 17 ........................................................................57  
Changes to ADC Test Modes Section...........................................78  
Changes to Table 36 ........................................................................83  
Changes to Ordering Guide...........................................................97  
Differential Input Configurations Section...................................25  
Added Input Buffer Control Registers (0x018, 0x019, 0x01A,  
0x935, 0x934, 0x11A) Section, Figure 66, Figure 68, and Table 9;  
Renumbered Sequentially ..............................................................26  
Changes to Analog Input Buffer Controls and SFDR  
Optimization Section and Figure 67 ............................................26  
Added Figure 69 to Figure 72........................................................27  
Added Figure 73 to Figure 75........................................................28  
Changes to Table 10 ........................................................................28  
Added Input Clock Divider ½ Period Delay Adjust Section and  
Clock Fine Delay Adjust Section...................................................30  
Changes to Figure 83 and Temperature Diode Section .............31  
Added Signal Monitor Section and Figure 86 to Figure 89.......33  
Changes to Table 11 ........................................................................39  
Changes to Table 12 to Table 14....................................................40  
Changes to Table 16 ........................................................................41  
Deleted Figure 65 and Figure 66 ...................................................45  
Changes to Table 17 ........................................................................45  
Changes to Table 19 to Table 20....................................................46  
Changes to Table 22 ........................................................................47  
Changes to Table 23 ........................................................................49  
Changes to JESD204B Link Establishment Section ...................53  
Added Figure 105 to Figure 110....................................................56  
Changes to Example 1: Full Bandwidth Mode Section..............60  
Added Multichip Synchronization Section, Figure 115 to  
3/15—Rev. A to Rev. B  
Added AD9680-820 ........................................................... Universal  
Changes to Features Section ............................................................1  
Changes to Table 1 ............................................................................5  
Changes to Table 2 ............................................................................6  
Changes to Table 3 ............................................................................8  
Changes to Table 4 ............................................................................9  
Added Figure 14; Renumbered Sequentially...............................15  
Added AD9680-820 Section and Figure 31 Through Figure 36 ...19  
Added Figure 37 Through Figure 42 ............................................20  
Added Figure 43 Through Figure 48 ............................................21  
Added Figure 49 Through Figure 54 ............................................22  
Added Figure 55 ..............................................................................23  
Changes to Figure 69 and Figure 70 .............................................26  
Changes to Input Buffer Control Registers (0x018, 0x019, 0x01A,  
0x935, 0x934, 0x11A) Section, Table 9, and Figure 93....................31  
Added Figure 99 Through Figure 100..........................................33  
Changes to Table 10 ........................................................................34  
Changes to Clock Jitter Considerations Section .........................37  
Added Figure 112 ............................................................................37  
Changes to Digital Downconverter (DDC) Section...................42  
Changes to Table 17 ........................................................................51  
Changes to Table 36 ........................................................................77  
Changes to Ordering Guide...........................................................91  
Figure 117, and Table 28.................................................................62  
Added Test Modes Section and Table 29 to Table 33 .................66  
Changes to Reading the Memory Map Register Table Section.......70  
Changes to Table 36 ........................................................................71  
Changes to Power Supply Recommendations Section,  
Figure 118, and Exposed Pad Thermal Heat Slug  
Recommendations Section ............................................................83  
12/14—Rev. 0 to Rev. A  
Changes to Ordering Guide...........................................................84  
Added AD9680-500 ........................................................... Universal  
Changes to Features Section and Figure 1 .....................................1  
Changes to General Description Section.......................................4  
5/14—Revision 0: Initial Version  
Rev. C | Page 3 of 97  
 

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