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AD9481

更新时间: 2024-02-21 11:21:21
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
28页 1162K
描述
8-Bit, 250 MSPS 3.3 V A/D Converter

AD9481 数据手册

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8-Bit, 250 MSPS  
3.3 V A/D Converter  
AD9481  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
VREF SENSE  
AGND DRGND DRVDD  
AVDD  
DNL = 0.35 LSB  
INL = 0.26 LSB  
AD9481  
Single 3.3 V supply operation (3.0 V to 3.6 V)  
Power dissipation of 439 mW at 250 MSPS  
1 V p-p analog input range  
Internal 1.0 V reference  
Single-ended or differential analog inputs  
De-multiplexed CMOS outputs  
Power-down mode  
REFERENCE  
8
PORT  
A
D7A TO D0A  
D7B TO D0B  
VIN+  
VIN–  
8-BIT  
ADC  
T AND H  
8
PIPELINE  
CORE  
PORT  
B
8
DS+  
DS–  
CLK+  
CLK–  
CLOCK  
MGMT  
DCO+  
DCO–  
Clock duty cycle stabilizer  
LOGIC  
S1  
APPLICATIONS  
Digital oscilloscopes  
PDWN  
Instrumentation and measurement  
Communications  
Figure 1.  
Point-to-point radios  
Digital predistortion loops  
The AD9481 is available in a Pb-free, 44-lead, surface-mount  
package (TQFP-44) specified over the industrial temperature  
range (−40°C to +85°C).  
GENERAL DESCRIPTION  
The AD9481 is an 8-bit, monolithic analog-to-digital converter  
(ADC) optimized for high speed and low power consumption.  
Small in size and easy to use, the product operates at a  
250 MSPS conversion rate, with excellent linearity and dynamic  
performance over its full operating range.  
PRODUCT HIGHLIGHTS  
1. Superior linearity. A DNL of 0.35 makes the AD9481  
suitable for many instrumentation and measurement  
applications  
To minimize system cost and power dissipation, the AD9481  
includes an internal reference and track-and-hold circuit. The  
user only provides a 3.3 V power supply and a differential  
encode clock. No external reference or driver components are  
required for many applications.  
2. Power-down mode. A power-down function may be exercised  
to bring total consumption down to 15 mW.  
3. De-multiplexed CMOS outputs allow for easy interfacing  
with low cost FPGAs and standard logic.  
The digital outputs are TTL/CMOS-compatible with an option  
of twos complement or binary output format. The output data  
bits are provided in an interleaved fashion along with output  
clocks that simplifies data capture.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2004 Analog Devices, Inc. All rights reserved.  

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