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AD9387NK/PCB

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
12页 286K
描述
High Performance, Low Power HDMI⑩/DVI Transmitter

AD9387NK/PCB 数据手册

 浏览型号AD9387NK/PCB的Datasheet PDF文件第1页浏览型号AD9387NK/PCB的Datasheet PDF文件第2页浏览型号AD9387NK/PCB的Datasheet PDF文件第4页浏览型号AD9387NK/PCB的Datasheet PDF文件第5页浏览型号AD9387NK/PCB的Datasheet PDF文件第6页浏览型号AD9387NK/PCB的Datasheet PDF文件第7页 
Preliminary Technical Data  
AD9387NK  
SPECIFICATIONS  
Table 1.  
AD9387NK-BCPZ-80/AD9387NK-BBCZ-80  
Test Level 1  
Min  
Typ  
Max Unit  
Parameter  
Conditions  
Temp  
DIGITAL INPUTS  
Input Voltage, High (VIH)  
Input Voltage, Low (VIL)  
Input Capacitance  
DIGITAL OUTPUTS  
Full  
Full  
25°C  
VI  
VI  
V
1.4  
3.5  
0.7  
V
V
pF  
3
Output Voltage, High (VOH  
Output Voltage, Low (VOL  
)
Full  
Full  
VI  
VI  
VDD − 0.1  
V
V
)
0.4  
THERMAL CHARACTERISTICS  
Thermal Resistance  
θJC Junction-to-Case  
V
V
V
15.2  
59  
+25  
°C/W  
°C/W  
°C  
θJA Junction-to-Ambient  
Ambient Temperature  
DC SPECIFICATIONS  
Input Leakage Current (IIL)  
Input Clamp Voltage  
Full  
−25  
−10  
+85  
+10  
25°C  
25°C  
25°C  
VI  
V
V
V
IV  
μA  
V
V
V
ꢀA  
−16 mA  
+16 mA  
−0.8  
+0.8  
AVCC  
Differential High Level Output Voltage  
Differential Output Short-Circuit Current  
POWER SUPPLY  
10  
VDD (All) Supply Voltage  
VDD Supply Voltage Noise  
Power-Down Current  
Transmitter Supply Current2  
Transmitter Total Power  
AC SPECIFICATIONS  
Full  
Full  
25°C  
25°C  
Full  
IV  
V
IV  
IV  
VI  
1.71  
1.8  
1.89  
50  
V
mV p-p  
ꢀA  
mA  
mW  
10  
55  
100  
CLK Frequency  
25°C  
25°C  
Full  
Full  
Full  
IV  
IV  
IV  
IV  
IV  
VI  
VI  
VI  
VI  
VI  
13.5  
48  
80  
52  
2
MHz  
%
ns  
ns  
ns  
TMDS Output CLK Duty Cycle  
Worst Case CLK Input Jitter  
Input Data Setup Time  
Input Data Hold Time  
TMDS Differential Swing  
VSYNC and HSYNC Delay from DE Falling Edge  
VSYNC and HSYNC Delay to DE Rising Edge  
DE High Time  
1
1
800  
1000 1200 mV  
1
1
UI3  
UI3  
25°C  
25°C  
8191 UI3  
UI3  
DE Low Time  
138  
Differential Output Swing  
Low-to-High Transition Time  
High-to-Low Transition Time  
AUDIO AC TIMING  
25°C  
25°C  
VII  
VII  
75  
75  
490  
490  
Ps  
Ps  
Sample Rate  
I2S and S/PDIF  
Full  
IV  
IV  
IV  
IV  
IV  
32  
192  
1
kHz  
UI3  
ns  
ns  
ꢀs  
I2S Cycle Time  
25°C  
25°C  
25°C  
25°C  
I2S Setup Time  
15  
0
75  
I2S Hold Time  
Audio Pipeline Delay  
1 See the Explanation of Test Levels section.  
2 Using low output drive strength.  
3 UI = unit interval.  
Rev. PrA | Page 3 of 12  
 
 

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