AD8386
SERIAL INTERFACE SECTION
At 25°C, AVCC = 15.5 V, DVCC = 3.3 V, TA MIN = 0°C, TA MAX = 85°C, VRH = 9.5 V, VRL = 7 V, unless otherwise noted.
Table 2.
Parameter
Conditions
Min
Typ
Max
Unit
SERIAL DAC DC PERFORMANCE
DNL
INL
Output Offset Error
Scale Factor Error
SERIAL DAC OUTPUT DYNAMIC PERFORMANCE
VAO Settling Time, t26
VAO Settling Time, t26
SERIAL DAC OUTPUT CHARACTERISTICS
VAO Maximum
SVFS = 5 V
SVFS = 5 V
−1
+1
LSB
LSB
LSB
LSB
−1.5
−2.0
−3.0
+1.5
+2.0
+3.0
To 0.5%
CL = 100 pF
CL = 33 μF
1
2
15
μs
ms
SVRH − 1 LSB
V
VAO Minimum
SVRL
150
75
V
VAO − Grounded Mode
VAO Output Resistance
IOUT
CLOAD Low Range1
CLOAD High Range1
REFERENCE INPUTS
SVRH Range
mV
kΩ
mA
μF
μF
All supplies OFF
30
0.002
0.047
SVRL < SVRH
SVRL < SVRH
SVRL + 1
AGND + 1.5
1
AVCC − 3.5
SVRH − 1
8
V
V
V
SVRL Range
SVFS Range
SVRH Input Current
SVRL Input Current
DIGITAL INPUT CHARACTERISTICS
CIN
IIH
IIL
SVRS = 5 V
SVRS = 5 V
0.1
−1.3
μA
mA
−1.6
3
pF
μA
μA
V
0.05
−1
VIH
VIL
2.0
DGND
DVCC
0.8
V
VTH
1.65
V
DIGITAL TIMING CHARACTERISTICS
SEN to SCL Setup Time, t20
SCL, High Level Pulse Width, t21
SCL, Low Level Pulse Width, t22
SCL to SEN Hold Time, t23
SDI Setup Time, t24
SDI Hold Time, t25
POWER SUPPLIES
DVCC, Operating Range
DVCC, Quiescent Current
AVCC Operating Range
Total AVCC Quiescent Current
OPERATING TEMPERATURES
TA MIN to TA MAX
10
10
10
10
10
10
ns
ns
ns
ns
ns
ns
3
9
3.3
54
3.6
75
18
V
mA
V
80
100
mA
2
Ambient Temperature Range, TA
Still air, TSW = HIGH
Still air, TSW = LOW
0
0
70
85
°C
°C
2
Ambient Temperature Range, TA
1 Output VAO is designed to drive capacitive loads less than 0.002 μF or more than 0.047 μF. Load capacitances in the range 0.002 μF − 0.047 μF cause the output
overshoot to exceed 100 mV.
2 Operation at high ambient temperature requires a thermally optimized PCB layout (see the Applications section). In systems with limited or no airflow, the maximum
ambient operating temperature is limited to 70°C with the thermal protection enabled, VFS = 4 V, data update rate = 85 Ms/s. Operation at 85°C ambient temperature
requires the thermal protection circuit turned disabled (TSW = LOW).
Rev. 0 | Page 5 of 20