AD8386JCPZ

更新时间： 2024-02-18 20:48:33

品牌	Logo	应用领域
亚德诺 - ADI		驱动器
页数	文件大小	规格书
20页	378K
描述
10-Bit, 12-Channel Output Decimating LCD Driver

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AD8386JCPZ 数据手册

AD8386

SPECIFICATIONS

DECDRIVER® SECTION

At 25°C, AVCC = 15.5 V, DVCC = 3.3 V, T_{A MIN}= 0°C, T_{A MAX}= 85°C, VRH = 9.5 V, VRL = 7 V, unless otherwise noted.

Table 1.

Parameter

VIDEO DC PERFORMANCE¹

Conditions

Min

Typ

Max

Unit

T_{A MIN}to T_{A MAX}

VDE

VCME

DAC Code 450 to 800

T_{A MIN}to T_{A MAX}, C_L= 150 pF

20% to 80%, V_O= 5 V step

20% to 80%, V_O= 10 V step

−7.5

−3.5

+7.5

+3.5

VIDEO OUTPUT DYNAMIC PERFORMANCE

Data Switching Slew Rate

Invert Switching Slew Rate

Data Switching Settling Time to 1%

Data Switching Settling Time to 0.25%

Invert Switching Settling Time to 1%

Invert Switching Settling Time to 0.25%

Invert Switching Overshoot

CLK and Data Feedthrough²

All-Hostile Crosstalk³

400

560

250

100

V/μs

mV p-p

130

500

200

10 V Step

Amplitude

Glitch Duration

DAC Transition Glitch Energy

VIDEO OUTPUT CHARACTERISTICS

Output Voltage Swing

Output Voltage—Grounded Mode

Data Switching Delay: t₉

INV Switching Delay: t₁₀

Output Current

0.6

mV p-p

nV-s

DAC code 511 to 512

AVCC −VOH, VOL − AGND

1.1

200

100

1.3

5 V step

10 V step

Output Resistance

REFERENCE INPUTS

VRL Range

VRH Range

VRH – VRL Range

VRH Input Resistance

VRL Input Current

VRH Input Current

VRH ≥ VRL

VFS = 2 × (VRH − VRL)

To VRL

5.25

VRL

AVCC − 4

AVCC

2.75

kΩ

μA

−45

125

RESOLUTION

Coding

Binary

Bits

DIGITAL INPUT CHARACTERISTICS

C_IN

I_IH

I_IL

μA

0.05

−2

V_IH

V_IL

0.8

V_TH

1.65

330

−2

I_IHTSW

I_ILTSW

TSW R_PULLDOWN

μA

kΩ

Rev. 0 | Page 3 of 20

1 234 5 6 7...20

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