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AD834 PDF预览

AD834

更新时间: 2024-01-07 23:18:35
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
8页 260K
描述
500 MHz Four-Quadrant Multiplier

AD834 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP8,.25针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.43
模拟集成电路 - 其他类型:ANALOG MULTIPLIER OR DIVIDER标称带宽:500 MHz
JESD-30 代码:R-PDSO-G8JESD-609代码:e3
长度:4.9 mm湿度敏感等级:1
负电源电压最大值(Vsup):-9 V负电源电压最小值(Vsup):-4 V
标称负供电电压 (Vsup):-5 V最大负输入电压:-1 V
功能数量:1端子数量:8
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
最大正输入电压:1 V电源:+-5 V
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Analog Computational Functions最大供电电流 (Isup):35 mA
最大供电电压 (Vsup):9 V最小供电电压 (Vsup):4 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BIPOLAR温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.9 mm
Base Number Matches:1

AD834 数据手册

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AD834  
BASIC OPERATION  
Figure 7 is a functional equivalent of the AD834. There are  
three differential signal interfaces: the voltage inputs X =  
X1X2 and Y = Y1Y2, and the current output, W (see Figure  
7) which flows in the direction shown when X and Y are posi-  
tive. The outputs W1 and W2 each have a standing current of  
typically 8.5 mA.  
Figure 8. Basic Connections for Wideband Operation  
impedance is quite high (about 25 k), the input bias current of  
typically 45 µA can generate significant offset voltages if not  
compensated. For example, with a source and termination  
resistance of 50 (net source of 25 ) the offset would be  
25 Ω × 45 µA = 1.125 mV. This can be almost fully cancelled by  
including (in this example) another 25 resistor in series with  
the unusedinput (in Figure 8, either X1 or Y2). In order to  
minimize crosstalk the input pins closest to the output (X1 and  
Y2) should be grounded; the effect is merely to reverse the  
phase of the X input and thus alter the polarity of the output.  
Figure 7. AD834 Functional Block Diagram  
The input voltages are first converted to differential currents  
which drive the translinear core. The equivalent resistance of  
the voltage-to-current (V-I) converters is about 285 . This low  
value results in low input related noise and drift. However, the  
low full-scale input voltage results in relatively high nonlinearity  
in the V-I converters. This is significantly reduced by the use of  
distortion cancellation circuits which operate by Kelvin sensing  
the voltages generated in the corean important feature of the  
AD834.  
TRANSFER FUNCTION  
The output current W is the linear product of input voltages  
X and Y divided by (1 V)2 and multiplied by the scaling  
currentof 4 mA:  
The current mode output of the core is amplified by a special  
cascode stage which provides a current gain of nominally × 1.6,  
trimmed during manufacture to set up the full-scale output cur-  
rent of 4 mA. This output appears at a pair of open  
collectors which must be supplied with a voltage slightly  
above the voltage on Pin 6. As shown in Figure 8, this can be  
arranged by inserting a resistor in series with the supply to this  
pin and taking the load resistors to the full supply. With R3 =  
60 , the voltage drop across it is about 600 mV. Using two  
50 load resistors, the full-scale differential output voltage is  
400 mV.  
XY  
W =  
4mA  
2
1V  
(
)
Provided that it is understood that the inputs are specified in  
volts, a simplified expression can be used:  
W =(XY )4mA  
Alternatively, the full transfer function can be written:  
XY  
1V 250 Ω  
1
W =  
×
The full bandwidth potential of the AD834 can only be realized  
when very careful attention is paid to grounding and decou-  
pling. The device must be mounted close to a high quality  
ground plane and all lead lengths must be extremely short, in  
keeping with UHF circuit layout practice. In fact, the AD834  
shows useful response to well beyond 1 GHz, and the actual up-  
per frequency in a typical application will usually be determined  
by the care with which the layout is effected. Note that R4 (in  
series with the VS supply) carries about 30 mA and thus intro-  
duces a voltage drop of about 150 mV. It is made large enough  
to reduce the Q of the resonant circuit formed by the supply  
lead and the decoupling capacitor. Slightly larger values can be  
used, particularly when using higher supply voltages. Alterna-  
tively, lossy RF chokes or ferrite beads on the supply leads may  
be used.  
When both inputs are driven to their clipping level of about  
1.3 V, the peak output current is roughly doubled, to 8 mA,  
but distortion levels will then be very high.  
TRANSFORMER COUPLING  
In many high frequency applications where baseband operation  
is not required at either inputs or output, transformer coupling  
can be used. Figure 9 shows the use of a center-tapped output  
transformer, which provides the necessary dc load condition at  
the outputs W1 and W2, and is designed to match into the de-  
sired load impedance by appropriate choice of turns ratio. The  
specific choice of the transformer design will depend entirely on  
the application. Transformers may also be used at the inputs.  
Center-tapped transformers can reduce high frequency distor-  
tion and lower HF feedthrough by driving the inputs with  
balanced signals.  
Figure 8 shows the use of optional termination resistors at the  
inputs. Note that although the resistive component of the input  
REV. C  
–5–  

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