Low Cost, DC to 500 MHz, 92 dB
Logarithmic Amplifier
AD8307
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Complete multistage logarithmic amplifier
92 dB dynamic range: –75 dBm to +17 dBm
to –90 dBm using matching network
Single supply of 2.7 V minimum at 7.5 mA typical
DC to 500 MHz operation, ±1 dB linearity
Slope of 25 mV/dB, intercept of −84 dBm
Highly stable scaling over temperature
Fully differential dc-coupled signal path
100 ns power-up time, 150 μA sleep current
AD8307
BAND GAP REFERENCE
7
6
5
VPS
7.5mA
ENB
INT
AND BIASING
SIX 14.3dB 900MHz
AMPLIFIER STAGES
+INP
INP
INM
8
1
MIRROR
1.1kΩ
–INP
2µA
/dB
3
OUT
OFS
4
3
2
NINE DETECTOR CELLS
SPACED 14.3dB
12.5kΩ
COM
2
COM
INPUT-OFFSET
COMPENSATION LOOP
APPLICATIONS
Conversion of signal level to decibel form
Transmitter antenna power measurement
Receiver signal strength indication (RSSI)
Low cost radar and sonar signal processing
Network and spectrum analyzers (to 120 dB)
Signal level determination down to 20 Hz
True decibel ac mode for multimeters
Figure 1.
GENERAL DESCRIPTION
The AD8307 is the first logarithmic amplifier made available in
an 8-lead (SOIC_N) package. It is a complete 500 MHz monolithic
demodulating logarithmic amplifier based on the progressive
compression (successive detection) technique, providing a
dynamic range of 92 dB to ±3 dB law-conformance and 88 dB
to a tight ±1 dB error bound at all frequencies up to 100 MHz.
It is extremely stable and easy to use, requiring no significant
external components. A single-supply voltage of 2.7 V to 5.5 V
at 7.5 mA is needed, corresponding to an unprecedented power
consumption of only 22.5 mW at 3 V. A fast acting CMOS-
compatible control pin can disable the AD8307 to a standby
current of less than 150 μA.
only slightly at 500 MHz. There is no minimum frequency limit.
The AD8307 can be used at audio frequencies of 20 Hz or lower.
The output is a voltage scaled 25 mV/dB, generated by a current
of nominally 2 ꢁA/dB through an internal 12.5 kꢂ resistor. This
voltage varies from 0.25 V at an input of −74 dBm (that is, the
ac intercept is at −84 dBm, a 20 ꢁV rms sine input), up to 2.5 V
for an input of +1ꢀ dBm. This slope and intercept can be trimmed
using external adjustments. Using a 2.7 V supply, the output
scaling can be lowered, for example to 15 mV/dB, to permit
utilization of the full dynamic range.
The AD8307 exhibits excellent supply insensitivity and temperature
stability of the scaling parameters. The unique combination of
low cost, small size, low power consumption, high accuracy and
stability, very high dynamic range, and a frequency range
encompassing audio through IF to UHF makes this product
useful in numerous applications requiring the reduction of a
signal to its decibel equivalent.
Each of the cascaded amplifier/limiter cells has a small signal
gain of 14.3 dB, with a −3 dB bandwidth of 900 MHz. The input
is fully differential and at a moderately high impedance (1.1 kΩ
in parallel with about 1.4 pF). The AD8307 provides a basic
dynamic range extending from approximately −75 dBm (where
dBm refers to a 50 Ω source, that is, a sine amplitude of about
5ꢀ μV) up to +17 dBm (a sine amplitude of 2.2 V). A simple
input matching network can lower this range to –88 dBm to
+3 dBm. The logarithmic linearity is typically within ±0.3 dB up
to 100 MHz over the central portion of this range, and degrades
The AD8307 operates over the industrial temperature range of
−40°C to +85°C, and is available in 8-lead SOIC and 8-lead
PDIP packages.
Rev. D
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