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AD825AR

更新时间： 2024-02-27 05:20:12
品牌 Logo 应用领域
亚德诺 - ADI 放大器
页数 文件大小 规格书
11页 2079K
描述
Low Cost, General Purpose High Speed JFET Amplifier

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中文翻译

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AD825AR 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP,针数：8
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.31.00.01风险等级：1.67
放大器类型：OPERATIONAL AMPLIFIER最大平均偏置电流 (IIB)：0.0006 µA
标称共模抑制比：80 dB最大输入失调电压：5000 µV
JESD-30 代码：R-PDSO-G8JESD-609代码：e3
长度：4.9 mm湿度敏感等级：1
负供电电压上限：-18 V标称负供电电压 (Vsup)：-5 V
功能数量：1端子数量：8
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260认证状态：Not Qualified
座面最大高度：1.75 mm标称压摆率：130 V/us
子类别：Operational Amplifier供电电压上限：18 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：BIPOLAR温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30标称均一增益带宽：21000 kHz
宽度：3.9 mmBase Number Matches：1

AD825AR 数据手册

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AD825  
DRIVING CAPACITIVE LOADS  
1k⍀  
The internal compensation of the AD825, together with its high  
output current drive, permits excellent large signal performance  
while driving extremely high capacitive loads.  
10␮F  
+V  
S
0.01␮F  
THEORY OF OPERATION  
R
IN  
HP  
PULSE  
GENERATOR  
V
IN 1k⍀  
The AD825 is a low cost, wide band, high performance FET  
input operational amplifier. With its unique input stage design,  
the AD825 assures no phase reversal even for inputs that exceed  
the power supply voltages, and its output stage is designed to  
drive heavy capacitive or resistive load with small changes rela-  
tive to no load condition.  
V
OUT  
TEKTRONIX  
P6204 FET  
PROBE  
TEKTRONIX  
7A24  
PREAMP  
AD825  
50⍀  
0.01␮F  
10␮F  
C
L
–V  
S
The AD825 (Figure 27) consists of common-drain common-  
base FET input stage driving a cascoded, common base matched  
NPN gain stage. The output buffer stage uses emitter followers  
in a class AB amplifier that can deliver large current to the load  
while maintaining low levels of distortion.  
Figure 26a. Inverting Amplifier Driving a Capacitive Load  
INPUT  
The capacitor, CF, in the output stage, enables the AD825 to  
drive heavy capacitive load. For light load, the gain of the out-  
put buffer is close to unity, CF is bootstrapped and not much  
happens. As the capacitive load is increased, the gain of the  
output buffer is decreased and the bandwidth of the amplifier is  
reduced through a portion of CF adding to the dominant pole.  
As the capacitive load is further increased, the amplifier’s band-  
width continues to drop, maintaining the stability of the AD825.  
OUTPUT  
Input Consideration  
The AD825 with its unique input stage assures no phase rever-  
sal for signals as large or even larger than the supply voltages.  
Also, layout considerations of the input transistors assure func-  
tionality even with a large differential signal.  
Figure 26b. Inverting Amplifier Pulse Response  
While Driving a 400 pF Capacitive Loads  
The need for a low noise input stage calls for a larger FET transis-  
tor. One should consider the additional capacitance that is added  
to assure stability. When filters are designed with the AD825,  
one needs to consider the input capacitance (5 pF–6 pF) of the  
AD825 as part of the passive network.  
VPOS  
NEG  
POS  
Grounding and Bypassing  
The AD825 is a low input bias current FET amplifier. Its high  
frequency response makes it useful in applications such as photo  
diode interfaces, filters and audio circuits. When designing high  
frequency circuits, some special precautions are in order. Cir-  
cuits must be built with short interconnects, and resistances  
should have low inductive paths to ground. Power supply leads  
should be bypassed to common as close as possible to the ampli-  
fier pins. Ceramic capacitors of 0.1 µF are recommended.  
C
VOUT  
F
VNEG  
Figure 27. Simplified Schematic  
REV. C  
–9–  
1...67891011

中文翻译

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AD825AR 替代型号

型号 品牌 替代类型 描述 数据表
AD825AR ADI

当前型号

 Low Cost, General Purpose High Speed JFET Amplifier
AD825AR-REEL7 ADI

类似代替

 Low Cost, General Purpose High Speed JFET Amplifier

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