Low Cost, General Purpose
High Speed JFET Amplifier
a
AD825
CONNECTION DIAGRAM
FEATURES
High Speed
41 MHz, –3 dB Bandwidth
125 V/s Slew Rate
8-Lead Plastic SOIC (R) Package
80 ns Settling Time
Input Bias Current of 20 pA and Noise Current of
10 fA/√Hz
NC
–IN
1
2
3
4
8
7
6
5
NC
+V
AD825
S
TOP VIEW
Input Voltage Noise of 12 nV/√Hz
Fully Specified Power Supplies: ؎5 V to ؎15 V
Low Distortion: –76 dB at 1 MHz
High Output Drive Capability
Drives Unlimited Capacitance Load
50 mA Min Output Current
No Phase Reversal When Input Is at Rail
Available in 8-Lead SOIC
(Not to Scale)
+IN
–V
OUTPUT
NC
S
NC = NO CONNECT
APPLICATIONS
CCD
Low Distortion Filters
Mixed Gain Stages
Audio Amplifier
Photo Detector Interface
ADC Input Buffer
DAC Output Buffer
PRODUCT DESCRIPTION
The AD825 is a superbly optimized operational amplifier for
high speed, low cost and dc parameters, making it ideally suited
for a broad range of signal conditioning and data acquisition
applications. The ac performance, gain, bandwidth, slew rate
and drive capability are all very stable over temperature. The
AD825 also maintains stable gain under varying load conditions.
The unique input stage has ultralow input bias current and
ultralow input current noise. Signals that go to either rail on this
high performance input do not cause phase reversals at the output.
These features make the AD825 a good choice as a buffer for
MUX outputs, creating minimal offset and gain errors.
The AD825 is fully specified for operation with dual ±5 V and
±15 V supplies. This power supply flexibility, and the low sup-
ply current of 6.5 mA with excellent ac characteristics under all
supply conditions, makes the AD825 well suited for many
demanding applications.
Figure 1. Performance with Rail-to-Rail Input Signals
REV. C
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use, nor for any infringements of patents or other rights of third parties
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© Analog Devices, Inc., 1999