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AD8231-EVALZ

更新时间： 2024-02-22 23:51:58
品牌 Logo 应用领域
亚德诺 - ADI 仪表放大器
页数 文件大小 规格书
24页 675K
描述
Zero Drift, Digitally Programmable Instrumentation Amplifier

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中文翻译

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AD8231-EVALZ 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFN
包装说明：HVQCCN, LCC16,.16SQ,25针数：16
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.31.00.01风险等级：5.73
放大器类型：INSTRUMENTATION AMPLIFIER最大平均偏置电流 (IIB)：0.005 µA
标称带宽 (3dB)：1 MHz最小共模抑制比：100 dB
最大输入失调电流 (IIO)：0.0005 µA最大输入失调电压：15 µV
JESD-30 代码：S-XQCC-N16JESD-609代码：e3
长度：4 mm湿度敏感等级：1
最大非线性：0.005%功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装等效代码：LCC16,.16SQ,25
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260电源：3/5 V
认证状态：Not Qualified筛选级别：AEC-Q100
座面最大高度：1 mm标称压摆率：1.1 V/us
子类别：Instrumentation Amplifier最大压摆率：5 mA
供电电压上限：6 V标称供电电压 (Vsup)：5 V
表面贴装：YES温度等级：AUTOMOTIVE
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.65 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：4 mm
Base Number Matches：1

AD8231-EVALZ 数据手册

 浏览型号AD8231-EVALZ的Datasheet PDF文件第17页浏览型号AD8231-EVALZ的Datasheet PDF文件第18页浏览型号AD8231-EVALZ的Datasheet PDF文件第19页浏览型号AD8231-EVALZ的Datasheet PDF文件第21页浏览型号AD8231-EVALZ的Datasheet PDF文件第22页浏览型号AD8231-EVALZ的Datasheet PDF文件第23页 
AD8231  
If more common-mode range is required, the simplest solution is  
to apply less gain in the instrumentation amplifier. The extra op  
amp can be used to provide another gain stage after the in-amp.  
Because the AD8231 has good offset and noise performance at low  
gains, applying less gain in the instrumentation amplifier generally  
has a limited impact on the overall system performance.  
RF INTERFERENCE  
RF rectification is often a problem when amplifiers are used in  
applications where there are strong RF signals. The disturbance  
can appear as a small dc offset voltage. High frequency signals  
can be filtered with a low-pass, RC network placed at the  
input of the instrumentation amplifier, as shown in Figure 52.  
The filter limits the input signal bandwidth according to the  
following relationship  
REDUCING NOISE  
Because the AD8231 has no 1/f noise, reducing the bandwidth  
corresponds directly to less noise. Table 8 shows the AD8231  
performance at a gain of 1 at different bandwidths, assuming a  
2-pole Butterworth filter roll off.  
1
FilterFreqDiff =  
2π R(2CD + CC)  
1
FilterFreqCM =  
Table 8. AD8231 noise at various bandwidths  
2π RCC  
SNR  
SNR Differential  
where CD ≥ 10CC.  
Single-Ended1  
Output2  
Bandwidth  
(Hz)  
Noise  
(μV rms)  
+V  
S
dB  
Bits  
24.3  
23.5  
22.7  
21.8  
21.0  
20.2  
19.3  
18.5  
17.7  
16.9  
dB  
Bits  
25.3  
24.5  
23.7  
22.8  
22.0  
21.2  
20.3  
19.5  
18.7  
17.9  
1
3.2  
10  
0.07  
0.12  
0.21  
0.37  
0.66  
1.17  
2.07  
3.71  
6.55  
11.73  
148.3  
143.2  
138.3  
133.2  
128.3  
123.2  
118.3  
113.2  
108.3  
103.2  
154.3  
149.2  
144.3  
139.2  
137.63  
129.2  
124.3  
119.2  
117.3  
109.2  
0.1µF  
+INA  
10µF  
C
1nF  
C
R
32  
4.02kΩ  
100  
320  
1 k  
3.2 k  
10 k  
32 k  
V
C
D
10nF  
OUT  
AD8231  
R
REF  
–INA  
4.02kΩ  
C
C
1nF  
0.1µF  
10µF  
1 SNR for single-ended output configuration calculated with output signal of  
4.8 V p-p, which corresponds to 1.697 V rms.  
–V  
S
2 SNR for differential output configuration calculated with output signal of  
9.6 V p-p, which corresponds to 3.397 V rms.  
Figure 52. RFI Suppression  
Figure 52 shows an example where the differential filter frequency  
is approximately 2 kHz, and the common-mode filter frequency  
is approximately 40 kHz.  
The AD8231 has two clocks: an auto-zero clock at 3.4 kHz and  
a commutating clock at 54 kHz. While the auto-zero clock has  
negligible energy and can generally be ignored, the commutating  
clock has enough energy to significantly affect the noise of the  
part. Therefore, in applications where low noise is critical, limiting  
the bandwidth of the system below 54 kHz is recommended.  
Values of R and CC should be chosen to minimize RFI. Mismatch  
between the R × CC at the positive input and the R × CC at the  
negative input degrades the CMRR of the AD8231. By using a  
value of CD that is ten times larger than the value of CC, the  
effect of the mismatch is reduced and performance is improved.  
COMMON-MODE INPUT VOLTAGE RANGE  
The 3-op amp architecture of the AD8231 applies gain and then  
removes the common-mode voltage. Therefore, internal nodes  
in the AD8231 experience a combination of both the gained  
signal and the common-mode signal. This combined signal can  
be limited by the voltage supplies even when the individual input  
and output signals are not. To determine whether the signal could  
be limited, refer to Figure 12 through Figure 14 or use the  
following formula  
VDIFF ×Gain  
−VS + 0.04 V <VCM  
±
<+VS − 0.04 V  
2
Rev. A | Page 20 of 24  
 
 
 
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