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AD8231-EVALZ

更新时间： 2024-01-29 13:36:54
品牌 Logo 应用领域
亚德诺 - ADI 仪表放大器
页数 文件大小 规格书
24页 675K
描述
Zero Drift, Digitally Programmable Instrumentation Amplifier

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中文翻译

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AD8231-EVALZ 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFN
包装说明：HVQCCN, LCC16,.16SQ,25针数：16
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.31.00.01风险等级：5.73
放大器类型：INSTRUMENTATION AMPLIFIER最大平均偏置电流 (IIB)：0.005 µA
标称带宽 (3dB)：1 MHz最小共模抑制比：100 dB
最大输入失调电流 (IIO)：0.0005 µA最大输入失调电压：15 µV
JESD-30 代码：S-XQCC-N16JESD-609代码：e3
长度：4 mm湿度敏感等级：1
最大非线性：0.005%功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装等效代码：LCC16,.16SQ,25
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260电源：3/5 V
认证状态：Not Qualified筛选级别：AEC-Q100
座面最大高度：1 mm标称压摆率：1.1 V/us
子类别：Instrumentation Amplifier最大压摆率：5 mA
供电电压上限：6 V标称供电电压 (Vsup)：5 V
表面贴装：YES温度等级：AUTOMOTIVE
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.65 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：4 mm
Base Number Matches：1

AD8231-EVALZ 数据手册

 浏览型号AD8231-EVALZ的Datasheet PDF文件第15页浏览型号AD8231-EVALZ的Datasheet PDF文件第16页浏览型号AD8231-EVALZ的Datasheet PDF文件第17页浏览型号AD8231-EVALZ的Datasheet PDF文件第19页浏览型号AD8231-EVALZ的Datasheet PDF文件第20页浏览型号AD8231-EVALZ的Datasheet PDF文件第21页 
AD8231  
THEORY OF OPERATION  
CS A0 A1 A2  
SDN  
A4  
OUTB  
–INA  
14kΩ  
14kΩ  
14kΩ  
–INB  
+INB  
OUTA  
A1  
A2  
A3  
14kΩ  
+INA  
AD8231  
+V  
–V  
REF  
S
S
Figure 49. Simplified Schematic  
Table 7. Truth Table for AD8231 Gain Settings  
AMPLIFIER ARCHITECTURE  
CS  
A2  
A1  
A0  
Gain  
The AD8231 is based on the classic 3-op amp topology. This  
topology has two stages: a preamplifier to provide amplification,  
followed by a difference amplifier to remove the common-mode  
voltage. Figure 49 shows a simplified schematic of the AD8231.  
The preamp stage is composed of Amplifier A1, Amplifier A2,  
and a digitally controlled resistor network. The second stage is a  
gain of 1 difference amplifier composed of Amplifier A3 and  
four 14 kꢀ resistors. A1, A2, and A3 are all zero drift, rail-to-  
rail input, rail-to rail-output amplifiers.  
Low  
Low  
Low  
Low  
Low  
Low  
Low  
Low  
High  
Low  
Low  
Low  
Low  
High  
High  
High  
High  
X
Low  
Low  
High  
High  
Low  
Low  
High  
High  
X
Low  
High  
Low  
High  
Low  
High  
Low  
High  
X
1
2
4
8
16  
32  
64  
128  
No change  
The AD8231 design makes it extremely robust over temperature.  
The AD8231 uses an internal thin film resistor to set the gain.  
Because all of the resistors are on the same die, gain temperature  
drift performance and CMRR drift performance are better than  
can be achieved with topologies using external resistors. The  
AD8231 also uses an auto-zero topology to null the offsets of all its  
internal amplifiers. Because this topology continually corrects for  
any offset errors, offset temperature drift is nearly nonexistent.  
REFERENCE TERMINAL  
The output voltage of the AD8231 is developed with respect to  
the potential on the reference terminal, which is useful when  
the output signal needs to be offset to a midsupply level. For  
example, a voltage source can be tied to the REF pin to level-  
shift the output so that the AD8231 can drive a single-supply  
ADC. The REF pin is protected with ESD diodes and should  
not exceed either +VS or −VS by more than 0.3 V.  
The AD8231 also includes a free operational amplifier. Like  
the other amplifiers in the AD8231, it is a zero drift, rail-to-rail  
input, rail-to-rail output architecture.  
For best performance, source impedance to the REF terminal  
should be kept below 1 Ω. As shown in Figure 49, the reference  
terminal, REF, is at one end of a 14 kꢀ resistor. Additional  
impedance at the REF terminal adds to this 14 kꢀ resistor  
and results in amplification of the signal connected to the  
positive input, causing a CMRR error.  
GAIN SELECTION  
The gain of the AD8231 is set by voltages applied to the A0, A1,  
CS  
and A2 pins. To change the gain, the  
pin must be driven  
pin is driven high, the gain is latched, and  
CS  
CS  
low. When the  
voltages at the A0 to A2 pins have no effect. Because the  
pin  
INCORRECT  
CORRECT  
is level sensitive rather than edge sensitive, it can also be tied  
permanently low. Table 7 shows the different gain settings.  
+
+
AD8231  
AD8231  
The time required for a gain change is dominated by the settling  
time of the amplifier. The AD8231 takes about 200 ns to switch  
gains, after which the amplifier begins to settle. Refer to Figure 28  
through Figure 32 to determine the settling time for different gains.  
IN-AMP  
IN-AMP  
V
REF  
–
–
REF  
REF  
V
REF  
+
AD8231  
OP AMP  
–
Figure 50. Driving the Reference (REF)  
Rev. A | Page 18 of 24  
 
 
 
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