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AD8180-EB PDF预览

AD8180-EB

更新时间: 2024-11-22 22:37:27
品牌 Logo 应用领域
亚德诺 - ADI 复用器开关
页数 文件大小 规格书
12页 256K
描述
750 MHz, 3.8 mA 10 ns Switching Multiplexers

AD8180-EB 数据手册

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750 MHz, 3.8 mA  
a
10 ns Switching Multiplexers  
AD8180/AD8182*  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Fully Buffered Inputs and Outputs  
Fast Channel Switching: 10 ns  
High Speed  
> 750 MHz Bandwidth (–3 dB)  
750 V/s Slew Rate  
Fast Settling Time of 14 ns to 0.1%  
Low Power: 3.8 mA (AD8180), 6.8 mA (AD8182)  
Excellent Video Specifications (RL 1 k)  
Gain Flatness of 0.1 dB Beyond 100 MHz  
0.02% Differential Gain Error  
0.02؇ Differential Phase Error  
Low Glitch: < 35 mV  
Low All-Hostile Crosstalk of –80 dB @ 5 MHz  
High “OFF” Isolation of –90 dB @ 5 MHz  
Low Cost  
IN0  
GND  
IN1  
1
2
3
4
8
7
6
5
SELECT  
+1  
DECODER  
ENABLE  
OUT  
+1  
+V  
S
–V  
S
AD8180  
IN0 A  
GND  
1
2
3
4
5
6
14 SELECT A  
13  
+1  
DECODER  
ENABLE A  
IN1 A  
12 OUT A  
+1  
+V  
S
–V  
AD8182  
11  
S
IN1 B  
GND  
10 OUT B  
+1  
9
8
ENABLE B  
DECODER  
Fast Output Disable Feature for Connecting Multiple Devices  
IN0 B  
7
+1  
SELECT B  
APPLICATIONS  
Pixel Switching for “Picture-In-Picture”  
Switching in LCD and Plasma Displays  
Video Switchers and Routers  
Table I. Truth Table  
PRODUCT DESCRIPTION  
SELECT  
ENABLE  
OUTPUT  
The AD8180 (single) and AD8182 (dual) are high speed 2-to-1  
multiplexers. They offer –3 dB signal bandwidth greater than  
750 MHz along with slew rate of 750 V/µs. With better than  
80 dB of crosstalk and isolation, they are useful in many high  
speed applications. The differential gain and differential phase  
error of 0.02% and 0.02°, along with 0.1 dB flatness beyond  
100 MHz make the AD8180 and AD8182 ideal for professional  
video multiplexing. They offer 10 ns switching time making  
them an excellent choice for pixel switching (picture-in-picture)  
while consuming less than 3.8 mA (per 2:1 mux) on ±5 V sup-  
ply voltages.  
0
1
0
1
0
0
1
1
IN0  
IN1  
High Z  
High Z  
Both devices offer a high speed disable feature allowing the  
output to be configured into a high impedance state. This al-  
lows multiple outputs to be connected together for cascading  
stages while the “OFF” channels do not load the output bus.  
They operate on voltage supplies of ±5 V and are offered in 8-  
and 14-lead plastic DIP and SOIC packages.  
500mV  
/DIV  
5ns/DIV  
Figure 1. AD8180/AD8182 Switching Characteristics  
*Protected under U.S. Patent Number 5,955,908.  
REV. B  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 2000  

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