5秒后页面跳转
捷配首页

Datasheet > 消费电路 > 音频/视频放大器> AD8012AR
AD8012AR PDF预览

AD8012AR

更新时间： 2024-02-23 13:43:44
品牌 Logo 应用领域
亚德诺 - ADI 放大器
页数 文件大小 规格书
15页 417K
描述
Dual 350 MHz Low Power Amplifier

阅读下载

中文翻译

获取价格

AD8012AR 技术参数

是否无铅：含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP,针数：8
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.31.00.01风险等级：1.65
Is Samacsys：N放大器类型：OPERATIONAL AMPLIFIER
最大平均偏置电流 (IIB)：15 µA标称共模抑制比：60 dB
最大输入失调电压：4000 µVJESD-30 代码：R-PDSO-G8
JESD-609代码：e3长度：4.9 mm
湿度敏感等级：1负供电电压上限：-6.3 V
标称负供电电压 (Vsup)：-5 V功能数量：2
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：1.75 mm
标称压摆率：2250 V/us子类别：Operational Amplifier
供电电压上限：6.3 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：BIPOLAR
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
宽度：3.9 mmBase Number Matches：1

AD8012AR 数据手册

 浏览型号AD8012AR的Datasheet PDF文件第9页浏览型号AD8012AR的Datasheet PDF文件第10页浏览型号AD8012AR的Datasheet PDF文件第11页浏览型号AD8012AR的Datasheet PDF文件第12页浏览型号AD8012AR的Datasheet PDF文件第14页浏览型号AD8012AR的Datasheet PDF文件第15页 
AD8012  
The PCB should have a ground plane covering all unused por-  
tions of the component side of the board to provide a low im-  
pedance ground path. The ground plane should be removed  
from the area near the input pins to reduce stray capacitance.  
Choosing the Appropriate Turns Ratio for the Transformer  
Increasing the peak-to-peak output signal from the amplifier in  
the previous example, combined with a variation in the turns  
ratio of the transformer, can yield further enhancements to the  
circuit. The output signal swing of the AD8012 can be increased  
to about ±3.9 V before clipping occurs. This increases the peak-  
to-peak output of the differential amplifier to 15.6 V. Because  
the signal applied to the primary winding is now bigger, the  
transformer turns ratio of 1:1 can be replaced with a (step-  
down) turns ratio of about 1.3:1 (from amplifier to line). This  
steps the 7.8 V peak-to-peak primary voltage down to 6 V. This  
is the same secondary voltage as before so the resulting power  
delivered to the line is the same.  
Chip capacitors should be used for supply bypassing (see Fig-  
ure 43). One end should be connected to the ground plane  
and the other within 1/8 in. of each power pin. An additional  
(4.7 µF–10 µF) tantalum electrolytic capacitor should be con-  
nected in parallel.  
The feedback resistor should be located close to the inverting  
input pin in order to keep the stray capacitance at this node to a  
minimum. Capacitance greater than 1.5 pF at the inverting  
input will significantly affect high speed performance when  
operating at low noninverting gains.  
The received signal, which is small relative to the transmitted  
signal, will, however be stepped up by a factor of 1.3. Amplifying  
the received signal in this manner enhances its signal-to-noise  
ratio and is useful when the received signal is small compared to  
the to-be-transmitted signal.  
Stripline design techniques should be used for long signal traces  
(greater than about 1 in.). These should be designed with the  
proper system characteristic impedance and be properly termi-  
nated at each end.  
The impedance reflected from the 135 Ω line now becomes  
228 Ω (1.32 times 135 Ω). With a correctly terminated line, the  
amplifier must now drive a total load of 456 Ω (114 Ω + 114 Ω  
+ 228 Ω), considerably less than the original 270 Ω load. This  
reduces the drive current from the op amps by about 40%.  
R *  
O
R
G
R
F
V
V
IN  
OUT  
+V  
R
S
T
10␮F  
+
0.1␮F  
More significant however is the reduction in dynamic power  
consumption; that is, the power the amplifier must consume in  
order to deliver the load power. Increasing the output signal so  
that it is as close as possible to the power rails, minimizes the  
power consumed in the amplifier.  
*R CHOSEN FOR CHARACTERISTIC IMPEDANCE.  
O
There is, however, a price to pay in terms of increased signal  
distortion. Increasing the output signal of each op amp from the  
original ±3 V to ±3.9 V reduces the Spurious Free Dynamic  
Range (SFDR) from –65 dB to –50 dB (measured at 500 kHz),  
even though the overall load impedance has increased from  
270 Ω to 456 Ω.  
INVERTING CONFIGURATION  
R
F
R
G
R *  
O
V
OUT  
LAYOUT CONSIDERATIONS  
V
IN  
0.1␮F  
The specified high speed performance of the AD8012 requires  
careful attention to board layout and component selection.  
Table I shows recommended component values for the AD8012  
and Figures 44–49 show recommended layouts for the 8-lead  
SOIC and microSOIC packages for a positive gain. Proper RF  
design techniques and low parasitic component selections are  
mandatory.  
R
T
10␮F  
+
–V  
S
*R CHOSEN FOR CHARACTERISTIC IMPEDANCE.  
O
NONINVERTING CONFIGURATION  
Figure 43. Inverting and Noninverting Configurations  
Table I. Typical Bandwidth vs. Gain Setting Resistors  
Small Signal –3 dB BW (MHz),  
VS = ؎5 V, RL = 1 k⍀  
Gain  
RF  
RG  
RT  
–1  
750 Ω  
750 Ω  
750 Ω  
750 Ω  
750 Ω  
–
750 Ω  
82.5 Ω  
53.6 Ω  
49.9 Ω  
49.9 Ω  
49.9 Ω  
110  
350  
150  
40  
+1  
+2  
+10  
RT chosen for 50 Ω characteristic input impedance.  
REV. A  
–13–  
1...101112131415

中文翻译

下载PDF

AD8012AR 替代型号

型号 品牌 替代类型 描述 数据表
AD8012ARZ ADI

类似代替

 		Dual 350 MHz Low Power Amplifier

与AD8012AR相关器件

型号 品牌 描述 获取价格 数据表
AD8012ARM ADI Dual 350 MHz Low Power Amplifier

获取价格
AD8012ARM-REEL ADI Dual 350 MHz Low Power Amplifier

获取价格
AD8012ARM-REEL7 ADI Dual 350 MHz Low Power Amplifier

获取价格
AD8012ARMZ ADI Dual 350 MHz Low Power Amplifier

获取价格
AD8012ARMZ-REEL ADI Dual 350 MHz Low Power Amplifier

获取价格
AD8012ARMZ-REEL7 ADI Dual 350 MHz Low Power Amplifier

获取价格

与AD8012AR相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证