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AD7940BRJZ-REEL7 PDF预览

AD7940BRJZ-REEL7

更新时间: 2024-11-27 12:33:51
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描述
3 mW, 100 kSPS, 14-Bit ADC in 6-Lead SOT-23

AD7940BRJZ-REEL7 数据手册

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3 mW, 100 kSPS,  
14-Bit ADC in 6-Lead SOT-23  
AD7940  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
V
Fast throughput rate: 100 kSPS  
Specified for VDD of 2.5 V to 5.5 V  
Low power  
DD  
14-BIT SUCCESSIVE  
V
T/H  
APPROXIMATION  
ADC  
4 mW typ at 100 kSPS with 3 V supplies  
17 mW typ at 100 kSPS with 5 V supplies  
Wide input bandwidth:  
IN  
SCLK  
SDATA  
CS  
81 dB SINAD at 10 kHz input frequency  
Flexible power/serial clock speed management  
No pipeline delays  
CONTROL  
LOGIC  
AD7940  
High speed serial interface  
GND  
SPI®/QSPI™/MICROWIRE™/DSP compatible  
Standby mode: 0.5 µA max  
Figure 1.  
6-Lead SOT-23 and 8-Lead MSOP packages  
Table 1. 16-Bit and 14-Bit ADC (MSOP and SOT-23)  
APPLICATIONS  
Type  
100 kSPS 250 kSPS 500 kSPS  
Battery-powered systems  
Personal digital assistants  
Medical instruments  
Mobile communications  
Instrumentation and control systems  
Remote data acquisition systems  
16-Bit True Differential  
16-Bit Pseudo Differential  
16-Bit Unipolar  
14-Bit True Differential  
14-Bit Pseudo Differential  
14-Bit Unipolar  
AD7684  
AD7683  
AD7680  
AD7687  
AD7685  
AD7688  
AD7686  
AD7944  
AD7942  
AD7947  
AD7946  
AD7940  
This part features a standard successive approximation ADC  
GENERAL DESCRIPTION  
CS  
The AD79401 is a 14-bit, fast, low power, successive  
with accurate control of the sampling instant via a  
once off conversion control.  
input and  
approximation ADC. The part operates from a single 2.50 V to  
5.5 V power supply and features throughput rates up to 100 kSPS.  
The part contains a low noise, wide bandwidth track-and-hold  
amplifier that can handle input frequencies in excess of 7 MHz.  
PRODUCT HIGHLIGHTS  
1. First 14-bit ADC in a SOT-23 package.  
2. High throughput with low power consumption.  
The conversion process and data acquisition are controlled  
3. Flexible power/serial clock speed management. The  
conversion rate is determined by the serial clock, allowing  
the conversion time to be reduced through the serial clock  
speed increase. This allows the average power consumption  
to be reduced when a power-down mode is used while not  
converting. The part also features a shutdown mode to  
maximize power efficiency at lower throughput rates.  
Power consumption is 0.5 µA max when in shutdown.  
4. Reference derived from the power supply.  
CS  
using  
with microprocessors or DSPs. The input signal is sampled on  
CS  
and the serial clock, allowing the devices to interface  
the falling edge of  
and the conversion is also initiated at this  
point. There are no pipelined delays associated with the part.  
The AD7940 uses advanced design techniques to achieve very  
low power dissipation at fast throughput rates. The reference for  
the part is taken internally from VDD, which allows the widest  
dynamic input range to the ADC. Thus, the analog input range  
for this part is 0 V to VDD. The conversion rate is determined by  
the SCLK frequency.  
5. No pipeline delay.  
1Protected by US. Patent No. 6,681,332.  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
www.analog.com  
Fax: 781.461.3113 ©2004–2011 Analog Devices, Inc. All rights reserved.  
 

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