5秒后页面跳转
AD7705BRZ-REEL PDF预览

AD7705BRZ-REEL

更新时间: 2024-01-02 09:05:12
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
32页 266K
描述
3V/5V, 1 mW, 2-Channel Differential, 16-Bit Sigma-Delta ADC

AD7705BRZ-REEL 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP16,.4针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.02
最大模拟输入电压:2.5 V最小模拟输入电压:-2.5 V
转换器类型:ADC, DELTA-SIGMAJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:10.3 mm
最大线性误差 (EL):0.003%湿度敏感等级:1
模拟输入通道数量:2位数:16
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出位码:BINARY, OFFSET BINARY输出格式:SERIAL
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:3/5 V认证状态:Not Qualified
采样速率:0.0192 MHz座面最大高度:2.65 mm
子类别:Other Converters标称供电电压:3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:7.5 mmBase Number Matches:1

AD7705BRZ-REEL 数据手册

 浏览型号AD7705BRZ-REEL的Datasheet PDF文件第5页浏览型号AD7705BRZ-REEL的Datasheet PDF文件第6页浏览型号AD7705BRZ-REEL的Datasheet PDF文件第7页浏览型号AD7705BRZ-REEL的Datasheet PDF文件第9页浏览型号AD7705BRZ-REEL的Datasheet PDF文件第10页浏览型号AD7705BRZ-REEL的Datasheet PDF文件第11页 
AD7705/AD7706  
Table II. Peak-to-Peak Resolution vs. Gain and Output Update Rate @ 5 V  
Typical Peak-to-Peak Resolution Bits  
Filter First  
Notch and O/P –3 dB  
Gain of  
1
Gain of  
2
Gain of  
4
Gain of  
8
Gain of  
16  
Gain of  
32  
Gain of  
64  
Gain of  
128  
Data Rate  
Frequency  
MCLK IN = 2.4576 MHz  
50 Hz  
60 Hz  
250 Hz  
500 Hz  
13.1 Hz  
15.72 Hz  
65.5 Hz  
131 Hz  
16  
16  
13  
10  
16  
16  
13  
10  
16  
16  
13  
10  
16  
16  
13  
10  
16  
15  
13  
10  
16  
14  
13  
10  
15  
14  
12  
10  
14  
13  
12  
10  
MCLK IN = 1 MHz  
20 Hz  
25 Hz  
100 Hz  
200 Hz  
5.24 Hz  
16  
16  
13  
10  
16  
16  
13  
10  
16  
16  
13  
10  
16  
16  
13  
10  
16  
15  
13  
10  
16  
14  
13  
10  
15  
14  
12  
10  
14  
13  
12  
10  
6.55 Hz  
26.2 Hz  
52.4 Hz  
OUTPUT NOISE (3 V OPERATION)  
Table III shows the AD7705/AD7706 output rms noise for the selectable notch and –3 dB frequencies for the part, as selected by  
FS0 and FS1 of the Clock Register. The numbers given are for the bipolar input ranges with a VREF of +1.225 V and a VDD = 3 V.  
These numbers are typical and are generated at an analog input voltage of 0 V with the part used in either buffered or unbuffered  
mode. Table II meanwhile shows the output peak-to-peak noise for the selectable notch and –3 dB frequencies for the part. It is im-  
portant to note that these numbers represent the resolution for which there will be no code flicker. They are not calculated based on rms noise but  
on peak-to-peak noise. The numbers given are for bipolar input ranges with a VREF of +1.225 V and for either buffered or unbuffered  
mode. These numbers are typical and are rounded to the nearest LSB. The numbers apply for the CLK DIV bit of the Clock Regis-  
ter set to 0.  
Table III. Output RMS Noise vs. Gain and Output Update Rate @ 3 V  
Filter First  
Typical Output RMS Noise in V  
Notch and O/P –3 dB  
Gain of  
1
Gain of  
2
Gain of  
4
Gain of  
8
Gain of  
16  
Gain of  
32  
Gain of  
64  
Gain of  
128  
Data Rate  
Frequency  
MCLK IN = 2.4576 MHz  
50 Hz  
60 Hz  
250 Hz  
500 Hz  
13.1 Hz  
15.72 Hz  
65.5 Hz  
131 Hz  
3.8  
5.1  
50  
2.4  
2.9  
25  
1.5  
1.7  
14  
1.3  
1.5  
9.9  
41  
1.1  
1.2  
5.1  
22  
1.0  
1.0  
2.6  
9.7  
0.9  
0.9  
2.3  
5.1  
0.9  
0.9  
2.0  
3.3  
270  
135  
65  
MCLK IN = 1 MHz  
20 Hz  
25 Hz  
100 Hz  
200 Hz  
5.24 Hz  
3.8  
5.1  
50  
2.4  
2.9  
25  
1.5  
1.7  
14  
1.3  
1.5  
9.9  
41  
1.1  
1.2  
5.1  
22  
1.0  
1.0  
2.6  
9.7  
0.9  
0.9  
2.3  
5.1  
0.9  
0.9  
2.0  
3.3  
6.55 Hz  
26.2 Hz  
52.4 Hz  
270  
135  
65  
Table IV. Peak-to-Peak Resolution vs. Gain and Output Update Rate @ 3 V  
Typical Peak-to-Peak Resolution in Bits  
Filter First  
Notch and O/P –3 dB  
Data Rate Frequency  
Gain of  
1
Gain of  
2
Gain of  
4
Gain of  
8
Gain of  
16  
Gain of  
32  
Gain of  
64  
Gain of  
128  
M
50 Hz  
60 Hz  
250 Hz  
500 Hz  
CLK IN = 2.4576 MHz  
13.1 Hz  
15.72 Hz  
65.5 Hz  
131 Hz  
16  
16  
13  
10  
16  
15  
15  
13  
10  
15  
14  
13  
10  
14  
14  
12  
10  
13  
13  
12  
10  
13  
13  
11  
10  
12  
12  
11  
10  
16  
13  
10  
MCLK IN = 1 MHz  
20 Hz  
25 Hz  
100 Hz  
200 Hz  
5.24 Hz  
16  
16  
13  
10  
16  
16  
13  
10  
15  
15  
13  
10  
15  
14  
13  
10  
14  
14  
12  
10  
13  
13  
12  
10  
13  
13  
11  
10  
12  
12  
11  
10  
6.55 Hz  
26.2 Hz  
52.4 Hz  
–8–  
REV. A  

AD7705BRZ-REEL 替代型号

型号 品牌 替代类型 描述 数据表
AD7705BRZ-REEL ADI

当前型号

3V/5V, 1 mW, 2-Channel Differential, 16-Bit Sigma-Delta ADC
AD7705BRZ-REEL7 ADI

类似代替

3V/5V, 1 mW, 2-Channel Differential, 16-Bit Sigma-Delta ADC
AD7705BRUZ-REEL7 ADI

完全替代

3V/5V, 1 mW, 2-Channel Differential, 16-Bit Sigma-Delta ADC

与AD7705BRZ-REEL相关器件

型号 品牌 获取价格 描述 数据表
AD7705BRZ-REEL1 ADI

获取价格

3 V/5 V, 1 mW, 2-/3-Channel, 16-Bit, Sigma-Delta ADCs
AD7705BRZ-REEL7 ADI

获取价格

3V/5V, 1 mW, 2-Channel Differential, 16-Bit Sigma-Delta ADC
AD7705BRZ-REEL7 ROCHESTER

获取价格

2-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO16, 0.300 INCH, LEAD FREE, MS-013AA, SOIC-
AD7705BRZ-REEL71 ADI

获取价格

3 V/5 V, 1 mW, 2-/3-Channel, 16-Bit, Sigma-Delta ADCs
AD7705EB ADI

获取价格

3 V/5 V 1 mW 2-/3-Channel 16-Bit Sigma-Delta ADCs(264.12 k)
AD7706 ADI

获取价格

3 V/5 V, 1 mW 2-/3-Channel 16-Bit, Sigma-Delta ADCs
AD7706* ADI

获取价格

3 V/5 V. 1 mW 2-/3-Channel 16-Bit. Sigma-Delta ADCs
AD7706_15 ADI

获取价格

3 V/5 V, 1 mW, 2-/3-Channel
AD7706BN ADI

获取价格

3 V/5 V, 1 mW 2-/3-Channel 16-Bit, Sigma-Delta ADCs
AD7706BN ROCHESTER

获取价格

3-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDIP16, 0.300 INCH, PLASTIC, MS-001AB, DIP-16