Datasheet > AD7366-5BRUZ

AD7366-5BRUZ

更新时间： 2024-02-19 21:52:03

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
17页	205K
描述
True Bipolar Input, Dual 1us, 12-Bit, 2-Channel SAR ADC

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AD7366-5BRUZ 数据手册

Preliminary Technical Data

AD7366

tied to either a low or high logic state for the part to operate.

Suitable reference sources for the AD7366 include AD780,

0_DRI0E

The AD7366 also has a ꢀ_DRIꢀEfeature to control the voltage at

which the serial interface operates. ꢀ_DRIꢀEallows the ADC to

easily interface to both 3 ꢀ and ± ꢀ processors. For example, if

the AD7366 was operated with a ꢀ_CCof ± ꢀ, the ꢀ_DRIꢀEpin could

be powered from a 3 ꢀ supply, allowing a large dynamic range

with low voltage digital processors. Thus, the AD7366 could be

used with the ±10 ꢀ input range while still being able to

interface to 3 ꢀ digital parts.

AD1±82, ADR431, REF193, and ADR391.

The internal reference circuitry consists of a 2.± ꢀ band gap

reference and a reference buffer. When operating the AD7366

in internal reference mode, the 2.± ꢀ internal reference is

available at D_CAPA and D_CAPB pins, which should be decoupled

to AGND using a 680nF capacitor. It is recommended that the

internal reference be buffered before applying it elsewhere in

the system. The internal reference is capable of sourcing up to

1±0 μA with an analog input range of ±10 and 60 μA for both

the ±±ꢀ and 0-10ꢀ ranges.

To achieve the maximum throughput rate of 1.12Msps ꢀ_DRIꢀE

must be greater than or equal to 4.7±ꢀ, see table 3. The

maximum throughput rate for the AD7366 with the ꢀ_DRIꢀE

voltage set to less than 4.7± and greater than 2.7 is 1 Msps.

If the internal reference operation is required for the ADC

conversion, the REFSEL pin must be tied to logic high on

power-up. The reference buffer requires ±00 µs to power up and

charge the 680nF decoupling capacitor during the power-up

time.

REFERENCE

The AD7366 can operate with either the internal 2.± ꢀ on-chip

reference or an externally applied reference. The logic state of

the REFSEL pin determines whether the internal reference is

used. The internal reference is selected for both ADC when the

REFSEL pin is tied to logic high. If the REFSEL pin is tied to

GND then an external reference can be supplied through the

D_CAPA and D_CAPB pins. On power-up, the REFSEL pin must be

The AD7366 is specified for a 2.± ꢀ to 3 ꢀ reference range.

When a 3ꢀ reference is selected, the ranges are ±12 ꢀ, ±6 ꢀ, and

0 ꢀ to +12 ꢀ. For these ranges, the ꢀ_DDand ꢀ_SSsupply must be

equal to or greater than the +12ꢀ &-12ꢀ respectively.

Rev. PrG | Page 13 of 17

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