CMOS
DDS Modulator
a
AD7008
FEATURES
Single +5 V Supply
phase modulation, frequency modulation, and both in-phase and
quadrature amplitude modulation suitable for QAM and SSB
generation.
32-Bit Phase Accumulator
On-Chip COSINE and SINE Look-Up Tables
On-Chip 10-Bit DAC
Frequency, Phase and Amplitude Modulation
Parallel and Serial Loading
Software and Hardware Power Down Options
20 MHz and 50 MHz Speed Grades
44-Pin PLCC
Clock rates up to 20 MHz and 50 MHz are supported. Fre-
quency accuracy can be controlled to one part in 4 billion.
Modulation may be effected by loading registers either through
the parallel microprocessor interface or the serial interface. A
frequency-select pin permits selection between two frequencies
on a per cycle basis.
The serial and parallel interfaces may be operated independently
and asynchronously from the DDS clock; the transfer control
signals are internally synchronized to prevent metastability prob-
lems. The synchronizer can be bypassed to reduce the transfer
latency in the event that the microprocessor clock is synchro-
nous with the DDS clock.
APPLICATIONS
Frequency Synthesizers
Frequency, Phase or Amplitude Modulators
DDS Tuning
Digital Modulation
A power-down pin allows external control of a power-down
mode (also accessible through the microprocessor interface)
The AD7008 is available in 44-pin PLCC.
PRODUCT DESCRIPTION
The AD7008 direct digital synthesis chip is a numerically con-
trolled oscillator employing a 32-bit phase accumulator, sine and
cosine look-up tables and a 10-bit D/A converter integrated on a
single CMOS chip. Modulation capabilities are provided for
PRODUCT HIGHLIGHT
1. Low Power
2. DSP/µP Interface
3. Completely Integrated
FUNCTIONAL BLOCK DIAGRAM
V
V
REF
GND
AA
FS ADJUST
CLOCK
IQMOD [19:10]
10
FULLSCALE
ADJUST
COMP
FSELECT
10
10
32
32
32
FREQ0
REG
SIN
10
12
12
32
IOUT
IOUT
SIN/COS
ROM
Σ
MUX
Σ
Σ
10-BIT DAC
10
10
FREQ1
REG
PHASE
ACCUMULATOR
COS
12
10
IQMOD [9:0]
PHASE REG
SCLK
32-BIT SERIAL REGISTER
32-BIT PARALLEL REGISTER
MPU INTERFACE
SDATA
AD7008
COMMAND REG
TRANSFER LOGIC
D0
D15
TC0
TC3
LOAD
TEST
RESET
SLEEP
WR CS
REV. B
© Analog Devices, Inc., 1995
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
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