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AD7010 PDF预览

AD7010

更新时间: 2024-02-04 02:31:45
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
8页 252K
描述
CMOS JDC p/4 DQPSK Baseband Transmit Port

AD7010 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP-24
针数:24Reach Compliance Code:unknown
ECCN代码:5A991.GHTS代码:8542.39.00.01
风险等级:5.85JESD-30 代码:R-PDSO-G24
JESD-609代码:e0长度:8.2 mm
功能数量:1端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP24,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
座面最大高度:2 mm子类别:Other Telecom ICs
标称供电电压:5 V表面贴装:YES
技术:CMOS电信集成电路类型:TELECOM CIRCUIT
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.3 mm

AD7010 数据手册

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CMOS  
a
JDC /4 DQPSK Baseband Transmit Port  
AD7010  
FEATURES  
GENERAL D ESCRIP TIO N  
Single +5 V Supply  
T he AD7010 is a complete low power, CMOS, π/4 DQPSK  
modulator with single +5 V power supply. T he part is designed  
to perform the baseband conversion of I and Q transmit  
waveforms in accordance with the Japanese Digital Cellular  
T elephone system.  
On-Chip / 4 DQPSK Modulator  
Root-Raised-Cosine Tx Filters, = 0.5  
Tw o 10-Bit D/ A Converters  
4th Order Reconstruction Filters  
Differential Analog Outputs  
On-Chip Ram p Up/ Dow n Pow er Control  
On-Chip Tx Offset Calibration  
Very Low Pow er Dissipation, 30 m W typ  
Pow er Dow n Mode < 5 A  
On-Chip Voltage Reference  
24-Pin SSOP  
T he on-chip π/4 Differential Quadrature Phase Shift Keying  
(DQPSK) digital modulator, which includes the Root Raised  
Cosine filters, generates I and Q data in response to the transmit  
data stream. T he AD7010 also contains ramp control envelope  
logic to shape the I and Q output waveforms when ramping up  
or down at the beginning or end of a transmit burst.  
Besides providing all the necessary logic to perform π/4 DQPSK  
modulation, the part also provides reconstruction filters to  
smooth the DAC outputs, providing continuous time analog  
outputs. T he AD7010 generates differential analog outputs for  
both the I and Q signals.  
APPLICATIONS  
J apanese Digital Cellular Telephony  
As it is a necessity for all digital mobile systems to use the lowest  
possible power, the device has power down options. T he  
AD7010 is housed in a space efficient 24-pin SSOP (Shrink  
Small Outline Package).  
FUNCTIO NAL BLO CK D IAGRAM  
VDD  
VAA  
AGND  
DGND  
POWER  
ITx  
ITx  
10-BIT  
I-DAC  
RECONSTRUCTION  
FILTERS  
Tx DATA  
π/4 DQPSK  
MODULATOR  
CALIBRATION CIRCUITRY  
QTx  
QTx  
Tx CLK  
10-BIT  
Q-DAC  
RECONSTRUCTION  
FILTERS  
READY  
BIN  
BOUT  
2.46V  
REFERENCE  
AD7010  
MCLK  
BYPASS  
MODE1  
MODE2  
REV. B  
Inform ation furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assum ed by Analog Devices for its  
use, nor for any infringem ents of patents or other rights of third parties  
which m ay result from its use. No license is granted by im plication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.  
Tel: 617/ 329-4700 Fax: 617/ 326-8703  

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