Monolithic Synchronous
Voltage-to-Frequency Converter
a
AD652
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Full-Scale Frequency (Up to 2 MHz) Set by External
System Clock
Extremely Low Linearity Error (0.005% max at 1 MHz
FS, 0.02% max at 2 MHz FS)
No Critical External Components Required
Accurate 5 V Reference Voltage
Low Drift (25 ppm/؇C max)
Dual or Single Supply Operation
Voltage or Current Input
MIL-STD-883 Compliant Versions Available
PRODUCT DESCRIPTION
PRODUCT HIGHLIGHTS
The AD652 Synchronous Voltage-to-Frequency Converter
(SVFC) is a powerful building block for precision analog-to-
digital conversion, offering typical nonlinearity of 0.002%
(0.005% maximum) at a 100 kHz output frequency. The inher-
ent monotonicity of the transfer function and wide range of
clock frequencies allows the conversion time and resolution to
be optimized for specific applications.
1. The use of an external clock to set the full-scale frequency
allows the AD652 to achieve linearity and stability far supe-
rior to other monolithic VFCs. By using the same clock to
drive the AD652 and (through a suitable divider) also set the
counting period, conversion accuracy is maintained indepen-
dent of variations in clock frequency.
2. The AD652 Synchronous VFC requires only a single external
component (a noncritical integrator capacitor) for operation.
The AD652 uses a variation of the popular charge-balancing
technique to perform the conversion function. The AD652 uses
an external clock to define the full-scale output frequency,
rather than relying on the stability of an external capacitor. The
result is a more stable, more linear transfer function, with sig-
nificant application benefits in both single- and multichannel
systems.
3. The AD652 includes a buffered, accurate 5 V reference
which is available to the user.
4. The clock input of the AD652 is TTL and CMOS compat-
ible and can also be driven by sources referred to the negative
power supply. The flexible open-collector output stage pro-
vides sufficient current sinking capability for TTL and CMOS
logic, as well as for optical couplers and pulse transformers.
A capacitor-programmable one-shot is provided for selection
of optimum output pulse width for power reduction.
Gain drift is minimized using a precision low drift reference and
low TC on-chip thin-film scaling resistors. Furthermore, the ini-
tial gain error is reduced to less than 0.5% by the use of
laser-wafer-trimming.
5. The AD652 can also be configured for use as a synchronous
F/V converter for isolated analog signal transmission.
The analog and digital sections of the AD652 have been de-
signed to allow operation from a single-ended power source,
simplifying its use with isolated power supplies.
6. The AD652 is available in versions compliant with MIL-
STD-883. Refer to the Analog Devices Military Products
Databook or current AD652/883B data sheet for detailed
specifications.
The AD652 is available in five performance grades. The 20-lead
PLCC packaged JP and KP grades are specified for operation
over the 0°C to +70°C commercial temperature range. The
16-lead cerdip-packaged AQ and BQ grades are specified for
operation over the –40°C to +85°C industrial temperature
range, and the AD652SQ is available for operation over the full
–55°C to +125°C extended temperature range.
REV. B
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