AD6122ARS

更新时间： 2024-11-26 22:36:51

品牌	Logo	应用领域
亚德诺 - ADI		稳压器电信集成电路电信电路光电二极管信息通信管理
页数	文件大小	规格书
20页	264K
描述
CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator

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AD6122ARS 数据手册

CDMA 3 V Transmitter IF Subsystem

with Integrated Voltage Regulator

AD6122

FEATURES

range IF amplifiers with voltage-controlled gain and a power-

down control input. An integral low dropout regulator allows

operation from battery voltages from 2.9 V to 4.2 V.

Fully Compliant with IS98A and PCS Specifications

Linear IF Amplifier

–63 dB to +34 dB

Linear-in-dB Gain Control

The gain control input accepts an external gain control voltage

input from a DAC. It provides 97 dB of gain control with a

nominal 75 dB/V scale factor. Either an internal or an external

reference may be used to set the gain-control scale factor.

Temperature-Compensated Gain Control

Quadrature Modulator

Modulates IFs from 50 MHz to 350 MHz

Integral Low Dropout Regulator

Accepts 2.9 V to 4.2 V Input from Battery

Low Power

10.4 mA at Midgain

<10 ␮A Sleep Mode Operation

Companion Receiver IF Chip Available (AD6121)

The I and Q modulator accepts differential quadrature base-

band inputs from a CDMA baseband converter. The local oscil-

lator is injected at twice the IF frequency. A divide-by-two

quadrature generator followed by dual polyphase filters ensures

1° quadrature accuracy.

The modulator provides a common-mode reference output to

bias the transmit DACs in the baseband converter to the same

common-mode voltage as the modulator inputs, allowing dc

coupling between the two ICs and thus eliminating the need to

charge and discharge coupling capacitors. This allows the fastest

power-up and power-down times for the AD6122 and CDMA

baseband ICs.

APPLICATIONS

CDMA, W-CDMA, AMPS and TACS Operation

QPSK Transmitters

GENERAL DESCRIPTION

The AD6122 is a low power IF transmitter subsystem, specifi-

cally designed for CDMA applications. It consists of an I and Q

modulator, a divide-by-two quadrature generator, high dynamic

The AD6122 is fabricated using a 25 GHz f_tsilicon BiCMOS

process and is packaged in a 28-lead SSOP and a 32-leadless

LPCC chip scale package (5 mm × 5 mm).

FUNCTIONAL BLOCK DIAGRAM

VCC

QUADRATURE

MODULATOR

OUTPUT

IF AMPLIFIER

INPUT

ATTENUATOR

QUADRATURE MODULATOR

I INPUT

IF AMPLIFIERS

LOCAL

OSCILLATOR

INPUT

TRANSMIT

OUTPUT

،2

AD6122

Q INPUT

COMMON-MODE

REFERENCE

OUTPUT

GAIN

CONTROL

SCALE

TEMPERATURE

COMPENSATION

VPOS

VREG

LOW

FACTOR

DROPOUT

REGULATOR

POWER-

DOWN 2

POWER-

DOWN 1

GAIN CONTROL

VOLTAGE

INPUT

1.23 V

REFERENCE

OUTPUT

GAIN CONTROL

REFERENCE

VOLTAGE

INPUT

REV. B

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties

which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

Fax: 781/326-8703

World Wide Web Site: http://www.analog.com

12 3 4 5 6 7...20

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与AD6122ARS相关器件

型号	品牌	获取价格	描述	数据表
AD6122ARSRL	ADI	获取价格	CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator
AD6140	ADI	获取价格	Bandpass IF Subsystem
AD6140ARS	ADI	获取价格	Bandpass IF Subsystem
AD6140ARSRL	ADI	获取价格	Bandpass IF Subsystem
AD6190	ADI	获取价格	900 MHz RF Transceiver
AD6190ARS	ADI	获取价格	900 MHz RF Transceiver
AD6190ARSRL	ADI	获取价格	900 MHz RF Transceiver
AD61F08KAC	ETC	获取价格	THYRISTOR MODULE\|DOUBLER\|HALF-CNTLD\|POSITIVE\|15V V(RRM)\|60A I(T)
AD61F08KAF	ETC	获取价格	THYRISTOR MODULE\|DOUBLER\|HALF-CNTLD\|POSITIVE\|15V V(RRM)\|60A I(T)
AD61F08KBC	ETC	获取价格	THYRISTOR MODULE\|DOUBLER\|HALF-CNTLD\|POSITIVE\|15V V(RRM)\|60A I(T)

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