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AD5544_04

更新时间： 2024-09-16 04:04:07
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亚德诺 - ADI /
页数 文件大小 规格书
20页 1150K
描述
Quad, Current-Output, Serial-Input 16-/14-Bit DACs

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AD5544_04 数据手册

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Quad, Current-Output,  
Serial-Input 16-/14-Bit DACs  
AD5544/AD5554  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
V
A B C D  
AD5544 16-bit resolution  
AD5554 14-bit resolution  
2 mA full-scale current 20ꢀ, with VREF  
2 µs settling time  
VSS BIAS for zero-scale error reduction @ temp  
midscale or zero-scale reset  
REF  
V
DD  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
D8  
R
A
FB  
=
10 V  
SDO  
INPUT  
REGISTER  
DAC A  
REGISTER  
DAC A  
DAC B  
DAC C  
DAC D  
I
A
OUT  
R
R
R
R
R
R
R
R
A
A
GND  
R
B
FB  
INPUT  
REGISTER  
DAC B  
REGISTER  
16  
D9  
I
B
OUT  
D10  
D11  
D12  
D13  
D14  
D15  
A0  
Four separate, 4-Q multiplying reference inputs  
A
B
GND  
SPI®-compatible 3-wire interface  
Double buffered registers enable  
Simultaneous multichannel change  
Internal power ON reset  
R
I
C
FB  
INPUT  
REGISTER  
DAC C  
REGISTER  
C
OUT  
SDI  
A1  
A
C
GND  
CS  
R
I
D
FB  
CLK  
EN  
Compact SSOP-28 package  
INPUT  
REGISTER  
DAC D  
REGISTER  
D
OUT  
DAC  
A
B
C
D
A
D
GND  
APPLICATIONS  
Automatic test equipment  
Instrumentation  
2:4  
POWER-  
ON  
RESET  
AD5544  
DECODE  
A
F
GND  
Digitally controlled calibration  
DGND  
RS  
MSB  
LDAC  
V
SS  
Figure 1.  
GENERAL DESCRIPTION  
1.0  
The AD5544/AD5554 quad, 16-/14-bit, current-output, digital  
to-analog converters are designed to operate from a single  
5 V supply.  
DAC A  
DAC B  
DAC C  
DAC D  
0.5  
0
–0.5  
–1.0  
1.0  
The applied external reference input voltage (VREF) determines  
the full-scale output current. Integrated feedback resistors (RFB)  
provide temperature-tracking, full-scale voltage outputs when  
combined with an external I-to-V precision amplifier.  
0.5  
0
–0.5  
–1.0  
1.0  
A double-buffered serial-data interface offers high speed,  
3-wire, SPI- and microcontroller-compatible inputs using serial-  
0.5  
0
CS  
data-in (SDI), a chip-select ( ), and clock (CLK) signals. In  
addition, a serial-data-out pin (SDO) allows for daisy-chaining  
when multiple packages are used. A common, level-sensitive,  
–0.5  
–1.0  
1.0  
LDAC  
load-DAC strobe (  
) input allows the simultaneous update  
0.5  
0
of all DAC outputs from previously loaded input registers.  
Additionally, an internal power ON reset forces the output  
voltage to zero at system turn ON. An MSB pin allows system  
–0.5  
–1.0  
RS  
0
8192 16384 24576 32768 40960 49152 57344 65536  
CODE (Decimal)  
reset assertion ( ) to force all registers to zero code when  
MSB = 0, or to half-scale code when MSB = 1.  
Figure 2. AD5544 INL vs. Code Plot (TA = 25°C)  
The AD5544/AD5554 are packaged in the compact SSOP-28.  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2004 Analog Devices, Inc. All rights reserved.  
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