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AD5442ABCPZ-1-RL7

更新时间： 2024-11-21 19:47:27
品牌 Logo 应用领域
亚德诺 - ADI 输入元件光电二极管转换器
页数 文件大小 规格书
24页 429K
描述
SERIAL INPUT LOADING, 1us SETTLING TIME, 16-BIT DAC, PDSO10, 3 X 3 MM, ROHS COMPLIANT, MO-220WEED, LFCSP-10

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AD5442ABCPZ-1-RL7 数据手册

 浏览型号AD5442ABCPZ-1-RL7的Datasheet PDF文件第2页浏览型号AD5442ABCPZ-1-RL7的Datasheet PDF文件第3页浏览型号AD5442ABCPZ-1-RL7的Datasheet PDF文件第4页浏览型号AD5442ABCPZ-1-RL7的Datasheet PDF文件第5页浏览型号AD5442ABCPZ-1-RL7的Datasheet PDF文件第6页浏览型号AD5442ABCPZ-1-RL7的Datasheet PDF文件第7页 
2.7 V to 5.5 V, Serial-Input,  
Voltage-Output, 12-/16-Bit DAC  
AD5512A/AD5542A  
FEATURES  
12-/16-bit resolution  
FUNCTIONAL BLOCK DIAGRAM  
V
DD  
1 LSB INL  
11.8 nV/√Hz noise spectral density  
1 µs settling time  
1.1 nV-sec glitch energy  
0.05 ppm/°C temperature drift  
5 kV HBM ESD classification  
0.375 mW power consumption at 3 V  
2.7 V to 5.5 V single-supply operation  
R
FB  
R
FB  
INV  
V
REFF  
REFS  
R
INV  
16-BIT DAC  
OUT  
AGNDF  
AGNDS  
V
LOGIC  
CS  
16-BIT DAC LATCH  
CONTROL  
LOGIC  
LDAC  
SCLK  
DIN  
CLR  
LDAC  
functions  
Hardware  
and  
SERIAL INPUT REGISTER  
50 MHz SPI-/QSPI-/MICROWIRE-/DSP-compatible interface  
Power-on reset clears DAC output to midscale  
Available in 3 mm × 3 mm, 10-/16-lead LFCSP and  
16-lead TSSOP  
AD5512A/  
AD5542A  
CLR  
DGND  
Figure 1. 16-Lead TSSOP and 16-Lead LFCSP  
APPLICATIONS  
Automatic test equipment  
Precision source-measure instruments  
Data acquisition systems  
Medical and aerospace instrumentation  
Communication equipment  
GND  
10  
8
7
R
FB  
AD5542A-1  
R
FB  
INV  
V
R
INV  
1
2
6
16-BIT DAC  
REF  
OUT  
16-BIT DAC LATCH  
CS  
CLR  
5
3
4
CONTROL  
LOGIC  
SCLK  
DIN  
SERIAL INPUT REGISITER  
9
GENERAL DESCRIPTION  
V
DD  
The AD5512A/AD5542A are single, 12-/16-bit, serial input,  
unbuffered voltage output digital-to-analog converters (DAC)  
that operate from a single 2.7 V to 5.5 V supply. The DAC  
output range extends from 0 V to VREF and is guaranteed  
monotonic, providing 1 LSB INL accuracy at 16 bits without  
adjustment over the full specified temperature range of −40°C  
to +85°C (AD5542A) or −40°C to +125°C (AD5512A).  
Figure 2. 10-Lead LFCSP  
Table 1. Related Devices  
Part No. Description  
AD5040/AD5060 2.7 V to 5.5 V 14-/16-bit buffed output DACs  
2.7 V to 5.5 V 16-bit voltage output DACs  
18-/20-bit voltage output DACs  
16-bit 12 V/ 15 V bipolaꢀ output DAC  
4.5 V to 5.5 V, 12-/16-bit quad channel DAC  
16-bit, bipolaꢀ, voltage output DAC  
AD5541/AD5542  
AD5781/AD5791  
AD5570  
AD5024/AD5064  
AD5764  
Offering unbuffered outputs, the AD5512A/AD5542A achieve  
a 1 μs settling time with low offset errors ideal for high speed  
open loop control.  
The AD5512A/AD5542A incorporate a bipolar mode of operation  
PRODUCT HIGHLIGHTS  
that generates a  
VREF output swing. The AD5512A/AD5542A  
1. 16-bit performance without adjustment.  
2. 2.7 V to 5.5 V single supply operation.  
3. Low 11.8 nV/√Hz noise spectral density.  
4. Low 0.05 ppm/°C temperature drift.  
5. 3 mm × 3 mm LFCSP and TSSOP packaging.  
also include Kelvin sense connections for the reference and  
analog ground pins to reduce layout sensitivity.  
The AD5512A/AD5542A are available in a 16-lead LFCSP with  
the AD5542A also available in a 10-lead LFCSP and a 16-lead  
TSSOP. The AD5512A/AD5542A use a versatile 3-wire interface  
that is compatible with 50 MHz SPI, QSPI™, MICROWIRE™, and  
DSP interface standards.  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
www.analog.com  
Fax: 781.461.3113 ©2010-2011 Analog Devices, Inc. All rights reserved.  
 
 
 
 
 
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