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AD5339ARM-REEL7

更新时间： 2024-01-19 07:27:53
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
24页 928K
描述
2.5 V to 5.5 V, 250 UA, 2-Wire Interface Dual-Voltage Output, 8-/10-/12-Bit DACs

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中文翻译

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AD5339ARM-REEL7 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：MO-187AA, MSOP-8
针数：8Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.35最大模拟输出电压：5.499 V
最小模拟输出电压：0.001 V转换器类型：D/A CONVERTER
输入位码：BINARY输入格式：SERIAL
JESD-30 代码：S-PDSO-G8JESD-609代码：e0
长度：3 mm最大线性误差 (EL)：0.3906%
湿度敏感等级：1位数：12
功能数量：1端子数量：8
最高工作温度：105 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP8,.19封装形状：SQUARE
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：240
电源：3/5 V认证状态：Not Qualified
座面最大高度：1.1 mm最大稳定时间：10 µs
标称安定时间 (tstl)：8 µs子类别：Other Converters
最大压摆率：0.375 mA标称供电电压：3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn85Pb15)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
宽度：3 mmBase Number Matches：1

AD5339ARM-REEL7 数据手册

 浏览型号AD5339ARM-REEL7的Datasheet PDF文件第18页浏览型号AD5339ARM-REEL7的Datasheet PDF文件第19页浏览型号AD5339ARM-REEL7的Datasheet PDF文件第20页浏览型号AD5339ARM-REEL7的Datasheet PDF文件第22页浏览型号AD5339ARM-REEL7的Datasheet PDF文件第23页浏览型号AD5339ARM-REEL7的Datasheet PDF文件第24页 
AD5337/AD5338/AD5339  
PRODUCT AS A DIGITALLY PROGRAMMABLE  
WINDOW DETECTOR  
POWER SUPPLY DECOUPLING  
In any circuit where accuracy is important, careful consideration  
of the power supply and ground return layout helps to ensure  
the rated performance. The printed circuit board on which the  
AD5337/AD5338/AD5339 is mounted should be designed so  
that the analog and digital sections are separated and confined  
to certain areas of the board. If the AD5337/AD5338/AD5339  
is in a system where multiple devices require an AGND-to-  
DGND connection, the connection should be made at one  
point only. The star ground point should be established as close  
as possible to the device. The AD5337/AD5338/AD5339 should  
have ample supply bypassing of 10 µF in parallel with 0.1 µF on  
the supply located as close to the package as possible, ideally  
right up against the device. The 10 µF capacitors are the tantalum  
bead type. The 0.1 µF capacitor should have low effective series  
resistance (ESR) and low effective series inductance (ESI) to  
provide a low impedance path to ground at high frequencies to  
handle transient currents due to internal logic switching. The  
power supply lines of the AD5337/AD5338/ AD5339 should use  
as large a trace as possible to provide low impedance paths and  
reduce the effects of glitches on the power supply line. Fast  
switching signals such as clocks should be shielded with digital  
ground to avoid radiating noise to other parts of the board, and  
they should never be run near the reference inputs. A ground  
line routed between the SDA and SCL lines helps to reduce  
crosstalk between them. This is not required on a multilayer  
board because there is a separate ground plane, but separating  
the lines does help.  
Figure 39 shows a digitally programmable upper/lower limit  
detector using the two DACs in the AD5337/AD5338/AD5339.  
The upper and lower limits for the test are loaded into DAC A  
and DAC B, which, in turn, set the limits on the CMP04. If the  
signal at the VIN input is not within the programmed window,  
an LED indicates the fail condition.  
5V  
1kΩ  
0.1  
µ
F
10  
µ
F
1kΩ  
V
IN  
PASS  
FAIL  
V
DD  
V
REF  
REFIN  
V
A
B
OUT  
AD5337/  
AD5338/  
AD5339*  
1/2  
CMP04  
PASS/FAIL  
1/6 74HC05  
DIN  
SDA  
SCL  
SCL  
V
OUT  
GND  
*ADDITIONAL PINS OMITTED FOR CLARITY  
Figure 39. Window Detection  
COARSE AND FINE ADJUSTMENT CAPABILITIES  
The two DACs in the AD5337/AD5338/AD5339 can be paired  
together to form a coarse and fine adjustment function, as  
shown in Figure 40. DAC A is used to provide the coarse  
adjustment while DAC B provides the fine adjustment. Varying  
the ratio of R1 and R2 changes the relative effect of the coarse  
and fine adjustments. With the resistor values and external  
reference shown, the output amplifier has unity gain for the  
DAC A output, thus the output range is 0 V to 2.5 V − 1 LSB.  
For DAC B the amplifier has a gain of 7.6 × 10–3, giving DAC B  
a range equal to 19 mV.  
Avoid crossover of digital and analog signals. Traces on opposite  
sides of the board should run at right angles to each other. This  
reduces the effects of feedthrough through the board. Using a  
microstrip technique is the best solution, but its use is not  
always possible with a double-sided board. In this technique,  
the component side of the board is dedicated to ground plane,  
while signal traces are placed on the solder side.  
The circuit is shown with a 2.5 V reference, but reference  
voltages up to VDD may be used. The op amps indicated will  
allow a rail-to-rail output swing.  
V
= 5V  
DD  
R3  
R4  
51.2kΩ  
390Ω  
10µF  
0.1µF  
5V  
V
IN  
V
V
OUT  
DD  
EXT  
REF  
GND  
REFIN  
V
A
VOUT  
AD820/  
OP295  
OUT  
R1  
390Ω  
1µF  
AD5337/  
AD5338/  
AD5339*  
AD780/REF192/ADR391  
WITH V = 5V  
DD  
V
B
OUT  
R2  
51.2kΩ  
GND  
*ADDITIONAL PINS OMITTED FOR CLARITY  
Figure 40. Coarse/Fine Adjustment  
Rev. A | Page 21 of 24  
 
 
 
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