Datasheet > AD5339ARM-REEL7

AD5339ARM-REEL7

更新时间： 2024-01-05 12:09:07

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
24页	928K
描述
2.5 V to 5.5 V, 250 UA, 2-Wire Interface Dual-Voltage Output, 8-/10-/12-Bit DACs

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技术参数
数据手册

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AD5339ARM-REEL7 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	TSSOP	包装说明：	MO-187AA, MSOP-8
针数：	8	Reach Compliance Code：	not_compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.35	最大模拟输出电压：	5.499 V
最小模拟输出电压：	0.001 V	转换器类型：	D/A CONVERTER
输入位码：	BINARY	输入格式：	SERIAL
JESD-30 代码：	S-PDSO-G8	JESD-609代码：	e0
长度：	3 mm	最大线性误差 (EL)：	0.3906%
湿度敏感等级：	1	位数：	12
功能数量：	1	端子数量：	8
最高工作温度：	105 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装等效代码：	TSSOP8,.19	封装形状：	SQUARE
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	峰值回流温度（摄氏度）：	240
电源：	3/5 V	认证状态：	Not Qualified
座面最大高度：	1.1 mm	最大稳定时间：	10 µs
标称安定时间 (tstl)：	8 µs	子类别：	Other Converters
最大压摆率：	0.375 mA	标称供电电压：	3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn85Pb15)
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	30
宽度：	3 mm	Base Number Matches：	1

AD5339ARM-REEL7 数据手册

AD5337/AD5338/AD5339

When both bits are 0, the DAC works with its normal power

consumption of 300 µA at 5 V. However, for the three power-

down modes, the supply current falls to 200 nA at 5 V (80 nA at

3 V). Not only does the supply current drop, but the output

stage is also internally switched from the output of the amplifier

to a resistor network of known values. This is advantageous in

that the output impedance of the part is known while the part is

in power-down mode, which provides a defined input condition

for whatever is connected to the output of the DAC amplifier.

There are three options. The output may be connected internally

to GND through a 1 kΩ resistor, a 100 kΩ resistor, or may be

left open-circuited (3-state). Resistor tolerance = 20%. The

output stage is illustrated in Figure 35.

DOUBLE-BUFFERED INTERFACE

The AD5337/AD5338/AD5339 DACs all have a double-buffered

interface consisting of two banks of registers—an input register

and a DAC register per channel. The input register is directly

connected to the input shift register, and the digital code is

transferred to the relevant input register upon completion of a

valid write sequence. The DAC register contains the digital code

used by the resistor string.

Access to the DAC register is controlled by the

bit. When

LDAC

the

bit is set high, the DAC register is latched and therefore

LDAC

the input register may change state without affecting the DAC

of all DAC outputs. The user may write to three of the input

registers individually; by setting the

to the remaining DAC input register, all outputs will update

simultaneously.

bit low when writing

LDAC

RESISTOR

STRING DAC

AMPLIFIER

OUT

These parts contain an extra feature whereby the DAC register

is only updated if its input register has been updated since the

POWER-DOWN

CIRCUITRY

RESISTOR

NETWORK

last time that

was brought low, thereby removing

LDAC

unnecessary digital crosstalk.

Figure 35. Output Stage during Power-Down

POWER-DOWN MODES

The bias generator, the output amplifiers, the resistor string, and

all other associated linear circuitry are shut down when power-

down mode is activated. However, the contents of the DAC

registers remain unchanged when power-down mode is activated.

The time to exit power-down is typically 2.5 µs for V_DD= 5 V

and 5 µs when V_DD= 3 V. This is the time from the rising edge

of the eighth SCL pulse to the time when the output voltage

deviates from its power-down voltage. See Figure 23 for a plot.

The AD5337/AD5338/AD5339 have very low power

consumption, typically dissipating 0.75 mW with a 3 V supply

and 1.5 mW with a 5 V supply. Power consumption can be

further reduced when the DACs are not in use by putting them

into one of three power-down modes, which are selected by

Bits 15 and 14 (PD1 and PD0) of the data byte. Table 8 shows

how the state of the bits corresponds to the mode of operation

of the DAC.

Table 8. PD1/PD0 Operating Modes

PD1

PD0

Operating Mode

Normal Operation

Power-Down (1 kΩ Load to GND)

Power-Down (1±± kΩ Load to GND)

Power-Down (3-State Output)

Rev. A | Page 19 of 24

1...16 17 181920 21 22...24

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与AD5339ARM-REEL7相关器件

型号	品牌	描述	获取价格	数据表
AD5339ARMZ	ADI	2.5 V to 5.5 V, 250 muA, 2-Wire Interface	获取价格
AD5339ARMZ-REEL7	ADI	2.5 V to 5.5 V, 250 muA, 2-Wire Interface	获取价格
AD5339BRM	ADI	2.5 V to 5.5 V, 250 UA, 2-Wire Interface Dual-Voltage Output, 8-/10-/12-Bit DACs	获取价格
AD5339BRM-REEL	ADI	2.5 V to 5.5 V, 250 UA, 2-Wire Interface Dual-Voltage Output, 8-/10-/12-Bit DACs	获取价格
AD5339BRM-REEL7	ADI	2.5 V to 5.5 V, 250 UA, 2-Wire Interface Dual-Voltage Output, 8-/10-/12-Bit DACs	获取价格
AD5339BRMZ	ADI	2.5 V to 5.5 V, 250 muA, 2-Wire Interface	获取价格

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