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AD5300

更新时间： 2024-02-29 16:13:32
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
12页 183K
描述
+2.7 V to +5.5 V, 140 uA, Rail-to-Rail Output 8-Bit DAC in an SOT-23

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AD5300 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：LSSOP, TSOP6,.11,37针数：6
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.31
最大模拟输出电压：5.5 V最小模拟输出电压：
转换器类型：D/A CONVERTER输入位码：BINARY
输入格式：SERIALJESD-30 代码：R-PDSO-G6
JESD-609代码：e3长度：2.9 mm
最大线性误差 (EL)：0.3906%湿度敏感等级：1
位数：8功能数量：1
端子数量：6最高工作温度：105 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：LSSOP封装等效代码：TSOP6,.11,37
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260电源：3/5 V
认证状态：Not Qualified座面最大高度：1.45 mm
最大稳定时间：6 µs标称安定时间 (tstl)：4 µs
子类别：Other Converters最大压摆率：0.25 mA
标称供电电压：3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：0.95 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：1.6 mm
Base Number Matches：1

AD5300 数据手册

 浏览型号AD5300的Datasheet PDF文件第6页浏览型号AD5300的Datasheet PDF文件第7页浏览型号AD5300的Datasheet PDF文件第8页浏览型号AD5300的Datasheet PDF文件第9页浏览型号AD5300的Datasheet PDF文件第11页浏览型号AD5300的Datasheet PDF文件第12页 
AD5300  
AD5300 to 68HC11/68L11 Interface  
Figure 26 shows a serial interface between the AD5300 and the  
68HC11/68L11 microcontroller. SCK of the 68HC11/68L11  
drives the SCLK of the AD5300, while the MOSI output drives  
the serial data line of the DAC. The SYNC signal is derived  
from a port line (PC7). The setup conditions for correct opera-  
tion of this interface are as follows: the 68HC11/68L11 should  
be configured so that its CPOL bit is a 0 and its CPHA bit is a  
1. When data is being transmitted to the DAC, the SYNC line is  
taken low (PC7). When the 68HC11/68L11 is configured as  
above, data appearing on the MOSI output is valid on the falling  
edge of SCK. Serial data from the 68HC11/68L11 is transmit-  
ted in 8-bit bytes with only eight falling clock edges occurring in  
the transmit cycle. Data is transmitted MSB first. In order to  
load data to the AD5300, PC7 is left low after the first eight bits  
are transferred, and a second serial write operation is performed  
to the DAC and PC7 is taken high at the end of this procedure.  
MICROWIRE*  
AD5300*  
CS  
SK  
SYNC  
SCLK  
DIN  
SO  
*ADDITIONAL PINS OMITTED FOR CLARITY  
Figure 28. AD5300 to MICROWIRE Interface  
APPLICATIONS  
Using REF19x as a Power Supply for AD5300  
Because the supply current required by the AD5300 is extremely  
low, an alternative option is to use a REF19x voltage reference  
(REF195 for 5 V or REF193 for 3 V) to supply the required  
voltage to the part—see Figure 29. This is especially useful if  
your power supply is quite noisy or if the system supply voltages  
are at some value other than 5 V or 3 V (e.g., 15 V). The REF19x  
will output a steady supply voltage for the AD5300. If the low  
dropout REF195 is used, the current it needs to supply to the  
AD5300 is 140 µA. This is with no load on the output of the  
DAC. When the DAC output is loaded, the REF195 also needs to  
supply the current to the load. The total current required (with  
a 5 kΩ load on the DAC output) is:  
68HC11/68L11*  
AD5300*  
PC7  
SYNC  
SCLK  
DIN  
SCK  
MOSI  
140 µA + (5 V/5 kΩ) = 1.14 mA  
*ADDITIONAL PINS OMITTED FOR CLARITY  
The load regulation of the REF195 is typically 2 ppm/mA,  
which results in an error of 2.3 ppm (11.5 µV) for the 1.14 mA  
current drawn from it. This corresponds to a 0.0006 LSB error.  
Figure 26. AD5300 to 68HC11/68L11 Interface  
AD5300 to 80C51/80L51 Interface  
Figure 27 shows a serial interface between the AD5300 and the  
80C51/80L51 microcontroller. The setup for the interface is as  
follows: TXD of the 80C51/80L51 drives SCLK of the AD5300,  
while RXD drives the serial data line of the part. The SYNC  
signal is again derived from a bit programmable pin on the port.  
In this case port line P3.3 is used. When data is to be transmit-  
ted to the AD5300, P3.3 is taken low. The 80C51/80L51 trans-  
mits data only in 8-bit bytes; thus only eight falling clock edges  
occur in the transmit cycle. To load data to the DAC, P3.3 is  
left low after the first eight bits are transmitted, and a second  
write cycle is initiated to transmit the second byte of data. P3.3  
is taken high following the completion of this cycle. The 80C51/  
80L51 outputs the serial data in a format which has the LSB  
first. The AD5300 requires its data with the MSB as the first bit  
received. The 80C51/80L51 transmit routine should take this  
into account.  
+15V  
+5V  
REF195  
140␮A  
SYNC  
SCLK  
DIN  
THREE-WIRE  
SERIAL  
INTERFACE  
V
= 0V TO 5V  
OUT  
AD5300  
Figure 29. REF195 as Power Supply to AD5300  
Bipolar Operation Using the AD5300  
The AD5300 has been designed for single-supply operation, but  
a bipolar output range is also possible using the circuit in Figure  
30. The circuit below will give an output voltage range of ±5 V.  
Rail-to-rail operation at the amplifier output is achievable using  
an AD820 or an OP295 as the output amplifier.  
The output voltage for any input code can be calculated as  
follows:  
AD5300*  
80C51/80L51*  
P3.3  
SYNC  
D
256  
R1+ R2  
R1  
R2  
R1  
TXD  
RXD  
SCLK  
DIN  
VO = VDD  
×
×
–VDD ×  
where D represents the input code in decimal (0–255).  
With VDD = 5 V, R1 = R2 = 10 kΩ:  
*ADDITIONAL PINS OMITTED FOR CLARITY  
Figure 27. AD5300 to 80C51/80L51 Interface  
AD5300 to Microwire Interface  
Figure 28 shows an interface between the AD5300 and any  
microwire compatible device. Serial data is shifted out on the  
falling edge of the serial clock and is clocked into the AD5300  
on the rising edge of the SK.  
10 × D  
VO  
=
– 5V  
256  
This is an output voltage range of ±5 V with 00 Hex corresponding  
to a –5 V output and FF Hex corresponding to a +5 V output.  
–10–  
REV. A  
1...789101112

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