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AD5252BRU100

更新时间： 2024-02-24 13:12:48
品牌 Logo 应用领域
亚德诺 - ADI 转换器电位器数字电位计存储电阻器光电二极管
页数 文件大小 规格书
28页 1181K
描述
Dual 64-and 256-Position I2C Nonvolatile Memory Digital Potentiometers

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中文翻译

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AD5252BRU100 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：TSSOP
包装说明：TSSOP,针数：14
Reach Compliance Code：unknown风险等级：5.84
其他特性：NONVOLATILE MEMORY; DEVICE SUPPORTS DUAL SUPPLY OPERATION标称带宽：0.04 kHz
控制接口：2-WIRE SERIAL转换器类型：DIGITAL POTENTIOMETER
JESD-30 代码：R-PDSO-G14JESD-609代码：e0
长度：5 mm湿度敏感等级：1
标称负供电电压：-2.5 V功能数量：2
位置数：256端子数量：14
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：240认证状态：COMMERCIAL
电阻定律：LINEAR最大电阻容差：20%
最大电阻器端电压：2.75 V最小电阻器端电压：-2.25 V
座面最大高度：1.2 mm标称供电电压：2.5 V
表面贴装：YES技术：CMOS
标称温度系数：650 ppm/ °C温度等级：INDUSTRIAL
端子面层：TIN LEAD端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30标称总电阻：100000 Ω
宽度：4.4 mmBase Number Matches：1

AD5252BRU100 数据手册

 浏览型号AD5252BRU100的Datasheet PDF文件第19页浏览型号AD5252BRU100的Datasheet PDF文件第20页浏览型号AD5252BRU100的Datasheet PDF文件第21页浏览型号AD5252BRU100的Datasheet PDF文件第23页浏览型号AD5252BRU100的Datasheet PDF文件第24页浏览型号AD5252BRU100的Datasheet PDF文件第25页 
AD5251/AD5252  
SW  
A
LAYOUT AND POWER SUPPLY BIASING  
A
X
It is always a good practice to employ a compact, minimum  
lead-length layout design. The leads to the input should be as  
direct as possible, with a minimum conductor length. Ground  
paths should have low resistance and low inductance.  
N
SW(2 –1)  
W
X
R
S
RDAC  
WIPER  
N
SW(2 –2)  
REGISTER  
AND  
DECODER  
Similarly, it is also good practice to bypass the power supplies  
with quality capacitors. Low equivalent series resistance (ESR)  
1 µF to 10 µF tantalum or electrolytic capacitors should be  
applied at the supplies to minimize any transient disturbance  
and filter low frequency ripple. Figure 39 illustrates the basic  
supply bypassing configuration for the AD5251/AD5252.  
SW(1)  
SW(0)  
R
R
S
S
N
R
= R /2  
AB  
S
DIGITAL  
SW  
B
AD5251/AD5252  
CIRCUITRY  
OMITTED FOR  
CLARITY  
B
X
V
DD  
V
DD  
+
C1  
C3  
C4  
Figure 40. Equivalent RDAC Structure  
10µF  
0.1µF  
0.1µF  
+
C2  
10µF  
V
SS  
V
SS  
GND  
PROGRAMMABLE RHEOSTAT OPERATION  
If either the W-to-B or W-to-A terminal is used as a variable  
resistor, the unused terminal can be opened or shorted with W;  
such operation is called rheostat mode (see Figure 41). The  
resistance tolerance can range 20%.  
Figure 39. Power Supply Bypassing  
The ground pin of the AD5251/AD5252 is used primarily as a  
digital ground reference. To minimize the digital ground  
bounce, the AD5251/AD5252 ground terminal should be joined  
remotely to the common ground (see Figure 39).  
A
A
A
W
W
W
B
B
B
DIGITAL POTENTIOMETER OPERATION  
Figure 41. Rheostat Mode Configuration  
The structure of the RDAC is designed to emulate the  
performance of a mechanical potentiometer. The RDAC  
contains a string of resistor segments, with an array of analog  
switches acting as the wiper connection to the resistor array.  
The number of points is the resolution of the device. For  
example, the AD5251/AD5252 emulates 64 or 256 connection  
points with 64 or 256 equal resistance, RS, allowing it to provide  
better than 1.5%/0.4% settability resolution.  
The nominal resistance of the AD5251/AD5252 has 64 or 256  
contact points accessed by the wiper terminal, plus the  
B terminal contact. The 6-or 8-bit data-word in the RDAC  
register is decoded to select one of the 64 or 256 settings. The  
wiper’s first connection starts at the B terminal for Data 0x00.  
This B-terminal connection has a wiper contact resistance, RW,  
of 75 Ω, regardless of the nominal resistance. The second  
connection (the AD5251 10 kΩ part) is the first tap point where  
RWB = 231 Ω (RWB = RAB/64 + RW = 156 Ω + 75 Ω) for Data  
0x01, and so on. Each LSB data value increase moves the wiper  
up the resistor ladder until the last tap point is reached at  
RWB = 9893 Ω. See Figure 40 for a simplified diagram of the  
equivalent RDAC circuit.  
Figure 40 provides an equivalent diagram of the connections  
between the three terminals that make up one channel of the  
RDAC. Switches SWA and SWB are always ON, while one of  
switches SW(0) to SW(2N–1) is ON one at a time, depending on  
the setting decoded from the data bit. Because the switches are  
nonideal, there is a 75 Ω wiper resistance, RW. Wiper resistance  
is a function of supply voltage and temperature; lower supply  
voltages and higher temperatures result in higher wiper  
resistances. Consideration of wiper resistance dynamics is  
important in applications where accurate prediction of output  
resistance is required.  
The general equation that determines the digitally programmed  
output resistance between W and B, is  
AD5251: RWB(D) = (D/64) × RAB + 75 Ω  
AD5252: RWB(D) = (D/256) × RAB + 75 Ω  
(1)  
(2)  
Where D is the decimal equivalent data contained in the RDAC  
latch and RAB is the nominal end-to-end resistance.  
Rev. 0 | Page 22 of 28  
 
 
 
 
 
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中文翻译

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AD5252BRU100 替代型号

型号 品牌 替代类型 描述 数据表
AD5252BRU100 ADI

当前型号

 Dual 64-and 256-Position I2C Nonvolatile Memory Digital Potentiometers
AD5252BRUZ100-RL7 ADI

类似代替

 Dual 64-/256-Position I2C Nonvolatile Memory Digital Potentiometers
AD5252BRUZ100 ADI

类似代替

 Dual 64-/256-Position I2C Nonvolatile Memory Digital Potentiometers

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