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AD5231BRUZ100 PDF预览

AD5231BRUZ100

更新时间: 2024-02-28 14:35:13
品牌 Logo 应用领域
亚德诺 - ADI 数字电位计存储
页数 文件大小 规格书
28页 536K
描述
Nonvolatile Memory, 1024-Position Digital Potentiometer

AD5231BRUZ100 数据手册

 浏览型号AD5231BRUZ100的Datasheet PDF文件第1页浏览型号AD5231BRUZ100的Datasheet PDF文件第2页浏览型号AD5231BRUZ100的Datasheet PDF文件第3页浏览型号AD5231BRUZ100的Datasheet PDF文件第5页浏览型号AD5231BRUZ100的Datasheet PDF文件第6页浏览型号AD5231BRUZ100的Datasheet PDF文件第7页 
AD5231  
Data Sheet  
Parameter  
Symbol  
Conditions  
Min  
Typ 1  
Max  
Unit  
POWER SUPPLIES  
Single-Supply Power Range  
Dual-Supply Power Range  
Positive Supply Current  
Negative Supply Current  
VDD  
VDD/VSS  
IDD  
VSS = 0 V  
2.7  
2.25  
5.5  
2.75  
10  
10  
V
V
µA  
µA  
VIH = VDD or VIL = GND  
VIH = VDD or VIL = GND,  
2.7  
0.5  
ISS  
VDD = +2.5 V, VSS = −2.5 V  
EEMEM Store Mode Current  
IDD (store)  
VIH = VDD or VIL = GND,  
40  
mA  
V
SS = GND, ISS ≈ 0  
ISS (store)  
IDD (restore)  
VDD = +2.5 V, VSS = −2.5 V  
VIH = VDD or VIL = GND,  
−40  
3
mA  
mA  
EEMEM Restore Mode Current7  
0.3  
9
V
SS = GND, ISS ≈ 0  
ISS (restore)  
PDISS  
PSS  
VDD = +2.5 V, VSS = −2.5 V  
VIH = VDD or VIL = GND  
ΔVDD = 5 V 10%  
−0.3  
−3  
0.018  
0.002  
−9  
0.05  
0.01  
mA  
mW  
%/%  
Power Dissipation8  
Power Supply Sensitivity5  
DYNAMIC CHARACTERISTICS5, 9  
Bandwidth  
BW  
−3 dB, RAB = 10 kΩ/50 kΩ/  
100 kΩ  
VA = 1 V rms, VB = 0 V, f = 1 kHz,  
370/85/44  
0.045  
kHz  
%
Total Harmonic Distortion  
THDW  
R
AB = 10 kΩ  
VA = 1 V rms, VB = 0 V, f = 1 kHz,  
AB = 50 kΩ, 100 kΩ  
VA = VDD, VB = 0 V,  
W = 0.50% error band,  
0.022  
%
R
VW Settling Time  
tS  
1.2/3.7/7  
µs  
V
Code 0x000 to 0x200  
for RAB = 10 kΩ/50 kΩ/100 kΩ  
Resistor Noise Voltage  
eN_WB  
RWB = 5 kΩ, f = 1 kHz  
9
nV/√Hz  
1 Typical values represent average readings at 25°C and VDD = 5 V.  
2 Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper  
positions. R-DNL measures the relative step change from ideal between successive tap positions. IW ~ 50 µA @ VDD = 2.7 V and IW ~ 400 µA @ VDD = 5 V for the  
RAB = 10 kΩ version, IW ~ 50 µA for the RAB = 50 kΩ, and IW ~ 25 µA for the RAB = 100 kΩ version (see Figure 26).  
3 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = VSS. DNL specification limits of  
−1 LSB minimum are guaranteed monotonic operating condition (see Figure 27).  
4 Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other. Dual-supply operation enables ground-  
referenced bipolar signal adjustment.  
5 Guaranteed by design and not subject to production test.  
6 Common-mode leakage current is a measure of the dc leakage from any Terminal B–W to a common-mode bias level of VDD/2.  
7 EEMEM restore mode current is not continuous. Current consumed while EEMEM locations are read and transferred to the RDAC register (see Figure 23). To minimize  
power dissipation, a NOP Instruction 0 (0x0) should be issued immediately after Instruction 1 (0x1).  
8 PDISS is calculated from (IDD × VDD) + (ISS × VSS).  
9 All dynamic characteristics use VDD = +2.5 V and VSS = −2.5 V.  
Rev. D | Page 4 of 28  

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