ACS110-7SN/SB2
Fig. 4: Relative variation of gate trigger current,
holding current and latching versus junction
temperature (typical values).
Fig. 5: Relative variation of static dV/dt versus
junction temperature.
dV/dt [T ] / dV/dt [T = 125°C]
j
j
I
, I , I [T ] / I , I , I [T = 25°C]
GT
H
L
j
GT
H
L
j
8
7
6
5
4
3
2
1
0
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VOUT=460V
IGT
IL & IH
T (°C)
j
T (°C)
j
25
50
75
100
125
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80 90 100 110 120 130
Fig. 6: Relative variation of critical rate of de-
crease of main current versus reapplied dV/dt
(typical values).
Fig. 7: Relative variation of critical rate of decrease
of main current versus junction temperature.
(dI/dt) [(dV/dt) ] / Specified (dI/dt)
(dI/dt) [Tj] / (dI/dt) [T = 125°C]
c c j
c
c
c
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
20
18
16
14
12
10
8
VOUT=400V
VOUT=400V
6
4
(dV/dt) (V/µs)
c
2
T (°C)
j
0
0
5
10
15
20
25
30
35
40
45
50
25
50
75
100
125
Fig. 9: Non repetitive surge peak on-state current
for a sinusoidal pulse with width tp < 10ms, and
corresponding value of I²t.
Fig. 8: Surge peak on-state current versus number
of cycles.
I
(A), I²t (A²s)
TSM
I
(A)
TSM
100.0
10.0
1.0
10
9
8
7
6
5
4
3
2
1
0
Tj initial=25°C
t=20ms
ITSM
Non repetitive
Tj initial=25°C
Repetitive
Tab=105°C
I²t
t (ms)
p
Number of cycles
0.1
1
10
100
1000
0.01
0.10
1.00
10.00
7/10