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ACE9020B/KG/NP2P

更新时间： 2024-12-01 03:21:35
品牌 Logo 应用领域
美高森美 - MICROSEMI 电信光电二极管电信集成电路
页数 文件大小 规格书
6页 479K
描述
Telecom Circuit, 1-Func, Bipolar, PDSO28, LEAD FREE, SSOP-28

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ACE9020B/KG/NP2P 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SSOP
针数：28Reach Compliance Code：compliant
风险等级：5.82JESD-30 代码：R-PDSO-G28
端子数量：28最高工作温度：85 °C
最低工作温度：-30 °C封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SSOP28,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
电源：3.75/4.85 V认证状态：Not Qualified
子类别：Other Telecom ICs最大压摆率：63 mA
表面贴装：YES技术：BIPOLAR
温度等级：OTHER端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL

ACE9020B/KG/NP2P 数据手册

 浏览型号ACE9020B/KG/NP2P的Datasheet PDF文件第2页浏览型号ACE9020B/KG/NP2P的Datasheet PDF文件第3页浏览型号ACE9020B/KG/NP2P的Datasheet PDF文件第4页浏览型号ACE9020B/KG/NP2P的Datasheet PDF文件第5页浏览型号ACE9020B/KG/NP2P的Datasheet PDF文件第6页 
ACE9020  
Receiver and Transmitter Interface  
May 2006  
ACE9020isaVHFoscillator, up-converterandprescaler.  
It is used in an offset modulated transmit architecture where a  
UHF synthesiser makes the channel selection and a second  
synthesiser generates a fixed transmit offset.  
A VCO signal drives a buffer in ACE9020 to feed an on-  
chip prescaler and transmit up-converter. The prescaler is a  
dual two-modulus divider and drives the main synthesiser  
input of the ACE9030. The SSB up-converter suppresses the  
unwanted transmit sideband.  
Ordering Information  
ACE9020B/KG/NP1S 28 Pin SSOP  
Tubes  
ACE9020B/KG/NP1T  
28 Pin SSOP  
Tape & Reel  
ACE9020B/KG/NP2P 28 Pin SSOP*  
ACE9020B/KG/NP2Q 28 Pin SSOP*  
Tubes, Bake & Drypack  
Tape & Reel,  
Bake & Drypack  
*Pb Free Matte Tin  
The VHF oscillator is buffered to drive the auxiliary  
synthesiser input of the ACE9030 and is locked to the offset  
frequency. This frequency is modulated by varying the  
resonant frequency of the external tank circuit. Both this  
oscillator and the UHF VCO drive the up-converting mixer to  
generate the transmit signal.  
Various power saving modes for battery economy are  
included. These allow the transmit sections to be shut down  
during stand-by and the whole chip can be shut down during  
sleep mode. Thecircuittechniques usedhavebeen chosento  
minimise external components and at the same time give very  
high performance.  
PD1  
PD2  
1
28  
VCC  
n.c.  
GND  
n.c.  
BIAS_REF  
VCC_TX  
TXPA+  
VCC_RX  
n.c.  
RXVCOIN  
GND_RX  
VCC_TXOSC  
TXOSC-  
TXOSC+  
GND_DIV  
RATIO_SEL  
DIV_OUT-  
DIV_OUT+  
TXPA-  
RSET_TXPA  
GND_TXOSC  
TANK+  
TANK-  
VCC_DIV  
GND_OSC  
MOD_CNTRL  
15  
14  
Features  
Note: Pin 1 is identified by moulded spot  
and by coding orientation.  
•
•
•
•
•
•
•
Low Power Low Voltage (3.6 to 5.0 V) Operation  
Power Down Modes  
NP28  
Differential Signals to Minimise Cross-talk  
Auxiliary Oscillator with Transmit Up-converter  
Prescaler for Main Synthesiser  
Part of the ACE Integrated Cellular Phone Chipset  
Small Outline 28 pin Package  
Figure 1 - Pin connections - top view  
TXOSC+  
TXOSC-  
RSET_TXPA  
Applications  
•
•
AMPS and TACS Cellular Telephone  
Two-Way Radio Systems  
TANK+  
TANK-  
TXPA+  
TXPA-  
VHF  
OSC  
BIAS_REF  
PD1  
BIAS &  
POWER  
DOWN  
Related Products  
ACE9020 is part of the following chipset:  
CONTROL  
PD2  
•
•
•
ACE9030 Radio Interface and Twin Synthesiser  
ACE9040 Audio Processor  
ACE9050 System Controller and Data Modem  
RXVCOIN  
ABSOLUTE MAXIMUM RATINGS  
Supply voltage  
6V  
- 65°C to + 150°C  
- 30°C to + 85°C  
-0.3V to VCC +0.3V  
500V  
Storage temperature  
Operating temperature  
Voltage at any pin  
RATIO_SEL  
DIV_OUT+  
DIV_OUT-  
DIVIDE BY  
64/65 OR 128/129  
MOD_CNTRL  
Static Sensitivity (HBM) min  
Figure 2 - ACE9020 simplified block digram  
1
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 1997-2006, Zarlink Semiconductor Inc. All Rights Reserved.  
123456

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