ACE1501EMT

更新时间： 2024-02-23 17:38:13

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		外围集成电路光电二极管微控制器可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数	文件大小	规格书
33页	1185K
描述
ACE1501 Product Family Arithmetic Controller Engine (ACEx⑩) for Low Power Applications

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技术参数
数据手册

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ACE1501EMT 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	DIP	包装说明：	DIP, DIP8,.3
针数：	8	Reach Compliance Code：	compliant
HTS代码：	8542.31.00.01	风险等级：	5.79
具有ADC：	NO	地址总线宽度：
位大小：	8	CPU系列：	ACE1502
最大时钟频率：	25 MHz	DAC 通道：	NO
DMA 通道：	NO	外部数据总线宽度：
JESD-30 代码：	R-PDIP-T8	长度：	9.817 mm
I/O 线路数量：	6	端子数量：	8
最高工作温度：	125 °C	最低工作温度：	-40 °C
PWM 通道：	YES	封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP	封装等效代码：	DIP8,.3
封装形状：	RECTANGULAR	封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	1.8/3.6 V
认证状态：	Not Qualified	RAM（字节）：	64
ROM（单词）：	1088	ROM可编程性：	EEPROM
座面最大高度：	5.08 mm	速度：	25 MHz
子类别：	Microcontrollers	最大压摆率：	1 mA
最大供电电压：	3.6 V	最小供电电压：	1.8 V
标称供电电压：	2.2 V	表面贴装：	NO
技术：	CMOS	温度等级：	AUTOMOTIVE
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	7.62 mm	uPs/uCs/外围集成电路类型：	MICROCONTROLLER
Base Number Matches：	1

ACE1501EMT 数据手册

3. Arithmetic Controller Core

The ACEx microcontroller core is speciﬁcally designed for low

cost applications involving bit manipulation, shifting and block

encryption. It is based on a modiﬁed Harvard architecture

meaning peripheral, I/O, and RAM locations are addressed sep-

arately from instruction data.

the overall code efﬁciency of the ACEx microcontroller and

takes advantage of the ﬂexibility found on Von Neumann style

machines.

3.1 CPU Registers

The ACEx microcontroller has ﬁve general-purpose registers.

These registers are the Accumulator (A), X-Pointer (X), Pro-

gram Counter (PC), Stack Pointer (SP), and Status Register

(SR). The X, SP, and SR registers are all memory-mapped.

The core differs from the traditional Harvard architecture by

aligning the data and instruction memory sequentially. This

allows the X-pointer (12-bits) to point to any memory location in

either segment of the memory map. This modiﬁcation improves

Figure 12. Programming Model

8-bit accumulator register

12-bit X pointer register

11-bit program counter

4-bit stack pointer

8-bit status register

NEGATIVE flag

HALF CARRY flag (from bit 3)

CARRY flag (from MSB)

ZERO flag (bit 4)

GLOBAL INTERRUPT enable

READY flag (from EEPROM)

Bit 11 = 1, then the LD A, [00,X] instruction will take a value

from address range 0x800 to 0xFFF and load it into A.

3.1.1 Accumulator (A)

The Accumulator is a general-purpose 8-bit register that is used

to hold data and results of arithmetic calculations or data manip-

ulations.

The X register can also serve as a counter or temporary storage

12 bit is dedicated for memory space selection.

3.1.2 X-Pointer (X)

3.1.3 Program Counter (PC)

The X-Pointer register allows for a 12-bit indexing value to be

added to an 8-bit offset creating an effective address used for

reading and writing between the entire memory space. (Soft-

ware can only read from code EEPROM.) This provides soft-

ware with the ﬂexibility of storing lookup tables in the code

EEPROM memory space for the core’s accessibility during nor-

mal operation.

The 11-bit program counter register contains the address of the

next instruction to be executed. After a reset, if in normal mode

the program counter is initialized to 0x800.

3.1.4 Stack Pointer (SP)

The ACEx microcontroller has an automatic program stack with

a 4-bit stack pointer. The stack can be initialized to any location

between addresses 0x30-0x3F. Normally, the stack pointer is

initialized by one of the ﬁrst instructions in an application pro-

gram. After a reset, the stack pointer is defaulted to 0xF pointing

to address 0x3F.

The ACEx core allows software to access the entire 12-bit X-

Pointer register using the special X-pointer instructions e.g. LD

X, #000H. (See Table 8.) However, software may also access

the register through any of the memory-mapped instructions

using the XHI (X[11:8]) and XLO (X[7:0]) variables located at

0xBE and 0xBF, respectively. (See Table 10.)

The stack is conﬁgured as a data structure which decrements

from high to low memory. Each time a new address is pushed

onto the stack, the core decrements the stack pointer by two.

Each time an address is pulled from the stack, the core incre-

ments the stack pointer is by two. At any given time, the stack

pointer points to the next free location in the stack.

The X register is divided into two sections. The 11 least signiﬁ-

cant bits (LSBs) of the register is the address of the program or

data memory space. The most signiﬁcant bit (MSB) of the reg-

ister is write only and selects between the data (0x000 to

0x0FF) or program (0x800 to 0xFFF) memory space.

When a subroutine is called by a jump to subroutine (JSR)

instruction, the address of the instruction is automatically

pushed onto the stack least signiﬁcant byte ﬁrst. When the

Example: If Bit 11 = 0, then the LD A, [00,X] instruction will take

a value from address range 0x000 to 0x0FF and load it into A. If

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ACE1501 Product Family Rev. 1.1

1...5 6 789 10 11...33

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与ACE1501EMT相关器件

型号	品牌	描述	获取价格	数据表
ACE1501EMT8	FAIRCHILD	ACE1501 Product Family Arithmetic Controller	获取价格
ACE1501EMT8X	FAIRCHILD	ACE1501 Product Family Arithmetic Controller	获取价格
ACE1501EMTX	FAIRCHILD	ACE1501 Product Family Arithmetic Controller	获取价格
ACE1501EMX	FAIRCHILD	ACE1501 Product Family Arithmetic Controller	获取价格
ACE1501EN	FAIRCHILD	ACE1501 Product Family Arithmetic Controller	获取价格
ACE1501EN14	FAIRCHILD	ACE1501 Product Family Arithmetic Controller	获取价格

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