Figures
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Block Diagram .........................................................................................................13
System Address Ranges ............................................................................................43
Microsoft MS-DOS* Legacy Address Range...................................................................44
Main Memory Address Range (1 MB to TOLUD).............................................................47
PCI Memory Address Range (TOLUD to 4 GB)...............................................................50
Graphics Register Memory and I/O Map.......................................................................55
Intel Flex Memory Technology Operation .....................................................................63
System Memory Styles..............................................................................................64
PCI Express Related Register Structures in GMCH .........................................................68
10 SDVO/PCI Express Non-Reversed Configurations ..........................................................70
11 SDVO/PCI Express Reversed Configurations.................................................................70
12 GMCH Graphics Controller Block Diagram.....................................................................75
13 Mobile Intel 4 Series Express Chipset Family Display Block Diagram ................................78
14 LVDS Signals and Swing Voltage ................................................................................81
15 LVDS Clock and Data Relationship ..............................................................................81
16 Panel Power Sequencing............................................................................................83
17 Integrated HDMI w/HDCP on Intel Centrino 2...............................................................84
18 SDVO Conceptual Block Diagram ................................................................................85
19 Platform External Sensor.........................................................................................105
20 DMA Address Translation.........................................................................................123
21 Ballout Diagram (Top View) Upper Left Quadrant........................................................126
22 Ballout Diagram (Top View) Upper Right Quadrant......................................................127
23 Ballout Diagram (Top View) Lower Left Quadrant........................................................128
24 Ballout Diagram (Top View) Lower Right Quadrant......................................................129
25 Mobile Intel 4 Series Express Chipset Drawing............................................................143
26 Ballout Diagram (Top View) Upper Left Quadrant........................................................144
27 Ballout Diagram (Top View) Upper Right Quadrant......................................................145
28 Ballout Diagram (Top View) Lower Right Quadrant......................................................146
29 Ballout Diagram (Top View) Lower Left Quadrant........................................................147
30 Intel GS45 Express Chipset Drawing .........................................................................149
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Datasheet