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ABV2088OC-T PDF预览

ABV2088OC-T

更新时间: 2024-11-23 03:11:11
品牌 Logo 应用领域
ABRACON 振荡器石英晶振压控振荡器机械
页数 文件大小 规格书
7页 71K
描述
Low Phase Noise VCXO (9.5-65MHz)

ABV2088OC-T 技术参数

生命周期:ActiveReach Compliance Code:compliant
风险等级:5.64Is Samacsys:N
其他特性:TAPE AND REEL; TR-STATE ENABLE/DISABLE FUNCTION; FREQUENCY RANGE OF 9.5 MHZ TO 65 MHZ; COMP OUT最大控制电压:3.3 V
最小控制电压:最长下降时间:1.5 ns
频率调整-机械:NO频率偏移/牵引率:100 ppm
线性度:10%安装特点:SURFACE MOUNT
最高工作温度:85 °C最低工作温度:-40 °C
振荡器类型:PECL输出负载:8 pF
物理尺寸:5.1mm x 4.5mm x 1.2mm最长上升时间:1.5 ns
最大供电电压:3.63 V最小供电电压:2.97 V
表面贴装:YES最大对称度:55/45 %
Base Number Matches:1

ABV2088OC-T 数据手册

 浏览型号ABV2088OC-T的Datasheet PDF文件第2页浏览型号ABV2088OC-T的Datasheet PDF文件第3页浏览型号ABV2088OC-T的Datasheet PDF文件第4页浏览型号ABV2088OC-T的Datasheet PDF文件第5页浏览型号ABV2088OC-T的Datasheet PDF文件第6页浏览型号ABV2088OC-T的Datasheet PDF文件第7页 
Preliminary ABV2088/89  
Low Phase Noise VCXO (9.5-65MHz)  
FEATURES  
PIN CONFIGURATION  
19MHz to 65MHz fundamental crystal input.  
Output range: 9.5MHz – 65MHz  
VDD  
XIN  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
DNC  
Complementary outputs: PECL or LVDS output.  
Selectable OE Logic (enable high or enable low).  
Integrated variable capacitors.  
Supports 2.5V or 3.3V Power Supply.  
Available in 16 pin TSSOP package.  
DNC  
XOUT  
DNC  
S2  
GNDBUF  
QBAR  
VDDBUF  
Q
OE  
DESCRIPTION  
VCON  
GND  
GNDBUF  
GND  
9
The ABV2088 (PECL) and ABV2089 (LVDS) are  
VCXO ICs specifically designed to work with  
fundamental crystals between 19MHz and 65MHz.  
The selectable divide by two feature extends the  
operation range from 9.5MHz to 65MHz. They  
require very low current into the crystal resulting in  
better overall stability. The OE logic feature allows  
selection of enable high or enable low.  
OUTPUT SELECTION AND ENABLE  
OE_SELECT  
OE_CTRL  
State  
0
Tri-state  
0
1 (Default) Output enabled  
0 (Default) Output enabled  
1 (Default)  
BLOCK DIAGRAM  
1
Tri-state  
Input selection: Bond to GND to set to “0”, bond to VDD to set to “1”  
No connection results to “default” setting through  
internal pull-up/-down.  
OE_CTRL:  
Logical states defined by PECL levels if  
OE_SELECT is “1”  
O
Q
Logical states defined by CMOS levels if  
OE_SELECT is “0”  
VCON  
X+  
Oscillator  
Amplifier  
with  
Integrated  
Varicaps  
Q
OUTPUT FREQUENCY DIVIDE BY  
TWO SELECTOR  
S2  
X-  
S2  
Output  
0
1
Intput/2  
Input  
ABV208X Block Diagram  
30332 Esperanza., Rancho Santa Margarita, Ca 92688 Ph: 949-546-8000 Fax: 949-546-8001 www.Abracon.com 03/21/05 Page 1  

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