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A80L960JA-16 PDF预览

A80L960JA-16

更新时间: 2024-11-05 20:05:51
品牌 Logo 应用领域
英特尔 - INTEL 时钟外围集成电路装置
页数 文件大小 规格书
59页 392K
描述
RISC Microprocessor, 32-Bit, 16.67MHz, CMOS, CPGA132, PGA-132

A80L960JA-16 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:PGA包装说明:PGA, PGA132,14X14
针数:132Reach Compliance Code:unknown
风险等级:5.92其他特性:OPERATING CASE TEMPERATURE 0 TO 100
地址总线宽度:32位大小:32
边界扫描:YES最大时钟频率:16.67 MHz
外部数据总线宽度:32格式:FIXED POINT
集成缓存:NOJESD-30 代码:S-CPGA-P132
JESD-609代码:e0长度:37.08 mm
低功率模式:YESDMA 通道数量:
外部中断装置数量:9串行 I/O 数:
端子数量:132片上数据RAM宽度:8
最高工作温度:100 °C最低工作温度:
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:PGA
封装等效代码:PGA132,14X14封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
RAM(字数):512座面最大高度:4.57 mm
速度:16.67 MHz子类别:Microprocessors
最大压摆率:184 mA最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:NO技术:CMOS
温度等级:OTHER端子面层:Tin/Lead (Sn/Pb)
端子形式:PIN/PEG端子节距:2.54 mm
端子位置:PERPENDICULAR处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:37.08 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR, RISC
Base Number Matches:1

A80L960JA-16 数据手册

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A
PRELIMINARY  
80L960JA/JF  
3.3 V EMBEDDED 32-BIT MICROPROCESSOR  
• 3.3 Volt Version of the 80960JA/JF Processor  
Pin/Code Compatible with all 80960Jx  
High Bandwidth Burst Bus  
Processors  
— 32-Bit Multiplexed Address/Data  
— Programmable Memory Configuration  
— Selectable 8-, 16-, 32-Bit Bus Widths  
— Supports Unaligned Accesses  
— Big or Little Endian Byte Ordering  
High-Performance Embedded Architecture  
— One Instruction/Clock Execution  
— Load/Store Programming Model  
— Sixteen 32-Bit Global Registers  
— Sixteen 32-Bit Local Registers (8 sets)  
— Nine Addressing Modes  
New Instructions  
— Conditional Add, Subtract and Select  
— Processor Management  
— User/Supervisor Protection Model  
High-Speed Interrupt Controller  
— 31 Programmable Priorities  
Two-Way Set Associative Instruction Cache  
— 80L960JA - 2 Kbyte  
— Eight Maskable Pins plus NMI  
— Up to 240 Vectors in Expanded Mode  
— 80L960JF - 4 Kbyte  
— Programmable Cache Locking  
Mechanism  
Two On-Chip Timers  
Direct Mapped Data Cache  
— 80L960JA - 1 Kbyte  
— Independent 32-Bit Counting  
— Clock Prescaling by 1, 2, 4 or 8  
— lnternal Interrupt Sources  
— 80L960JF - 2 Kbyte  
— Write Through Operation  
Halt Mode for Low Power  
On-Chip Stack Frame Cache  
— Seven Register Sets Can Be Saved  
— Automatic Allocation on Call/Return  
— 0-7 Frames Reserved for High-Priority  
Interrupts  
IEEE 1149.1 (JTAG) Boundary Scan  
Compatibility  
Packages  
— 132-Lead Pin Grid Array (PGA)  
— 132-Lead Plastic Quad Flat Pack (PQFP)  
On-Chip Data RAM  
— 1 Kbyte Critical Variable Storage  
— Single-Cycle Access  
132  
PIN 1  
99  
A
A80L960Jx  
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i960  
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19xx  
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33  
66  
Figure 1. 80L960JA/JF Microprocessor  
Information in this document is provided solely to enable use of Intel products. Intel assumes no liability whatsoever, including infringement of any  
patent or copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products. Information  
contained herein supersedes previously published specifications on these devices from Intel.  
© INTEL CORPORATION, 1995  
September 1995  
Order Number: 272744-002  

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