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A42MX36-3PQ240MX79 PDF预览

A42MX36-3PQ240MX79

更新时间： 2024-11-24 03:20:19
品牌 Logo 应用领域
ACTEL 栅可编程逻辑
页数 文件大小 规格书
123页 865K
描述
Field Programmable Gate Array, 1184 CLBs, 54000 Gates, CMOS, PQFP240, PLASTIC, QFP-240

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A42MX36-3PQ240MX79 数据手册

 浏览型号A42MX36-3PQ240MX79的Datasheet PDF文件第2页浏览型号A42MX36-3PQ240MX79的Datasheet PDF文件第3页浏览型号A42MX36-3PQ240MX79的Datasheet PDF文件第4页浏览型号A42MX36-3PQ240MX79的Datasheet PDF文件第5页浏览型号A42MX36-3PQ240MX79的Datasheet PDF文件第6页浏览型号A42MX36-3PQ240MX79的Datasheet PDF文件第7页 
v6.0  
40MX and 42MX FPGA Families  
Features  
HiRel Features  
•
Commercial, Industrial, Automotive, and Military  
Temperature Plastic Packages  
High Capacity  
•
Commercial, Military Temperature, and MIL-STD-883  
Ceramic Packages  
•
•
•
•
•
Single-Chip ASIC Alternative  
3,000 to 54,000 System Gates  
Up to 2.5 kbits Configurable Dual-Port SRAM  
Fast Wide-Decode Circuitry  
Up to 202 User-Programmable I/O Pins  
•
•
QML Certification  
Ceramic Devices Available to DSCC SMD  
Ease of Integration  
•
Mixed-Voltage Operation (5.0V or 3.3V for core and  
I/Os), with PCI-Compliant I/Os  
High Performance  
•
Up to 100% Resource Utilization and 100% Pin  
Locking  
•
•
•
•
•
5.6 ns Clock-to-Out  
250 MHz Performance  
5 ns Dual-Port SRAM Access  
100 MHz FIFOs  
•
•
Deterministic, User-Controllable Timing  
Unique In-System Diagnostic and Verification  
Capability with Silicon Explorer II  
7.5 ns 35-Bit Address Decode  
•
•
Low Power Consumption  
IEEE Standard 1149.1 (JTAG) Boundary Scan Testing  
Product Profile  
Device  
A40MX02  
A40MX04  
A42MX09  
A42MX16  
A42MX24  
A42MX36  
Capacity  
System Gates  
SRAM Bits  
3,000  
–
6,000  
–
14,000  
–
24,000  
–
36,000  
–
54,000  
2,560  
Logic Modules  
Sequential  
Combinatorial  
Decode  
–
295  
–
–
547  
–
348  
336  
–
624  
608  
–
954  
912  
24  
1,230  
1,184  
24  
Clock-to-Out  
9.5 ns  
9.5 ns  
5.6 ns  
6.1 ns  
6.1 ns  
6.3 ns  
SRAM Modules  
(64x4 or 32x8)  
–
–
–
–
–
348  
516  
2
–
624  
928  
2
–
954  
1,410  
2
10  
1,230  
1,822  
6
Dedicated Flip-Flops  
Maximum Flip-Flops  
Clocks  
147  
1
273  
1
User I/O (maximum)  
PCI  
57  
–
69  
–
104  
–
140  
–
176  
Yes  
Yes  
202  
Yes  
Boundary Scan Test (BST)  
–
–
–
–
Yes  
Packages (by pin count)  
PLCC  
PQFP  
VQFP  
TQFP  
CQFP  
PBGA  
44, 68  
44, 68, 84  
84  
100, 160  
100  
176  
–
84  
84  
160, 208  
–
100  
80  
–
–
–
100  
80  
–
–
–
100, 160, 208  
208, 240  
100  
176  
–
–
176  
–
–
–
208, 256  
272  
–
–
–
January 2004  
i
© 2004 Actel Corporation  
See the Actel website (www.actel.com) for the latest version of this datasheet.  
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 		Field Programmable Gate Array, 100MHz, 2438-Cell, CMOS, PQFP240,
A42MX36-3PQ240X79 MICROSEMI

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 		Field Programmable Gate Array, 1184 CLBs, 54000 Gates, CMOS, PQFP240, PLASTIC, QFP-240
A42MX36-3PQ240YC MICROSEMI

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 		Field Programmable Gate Array
A42MX36-3PQ240YI MICROSEMI

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 		Field Programmable Gate Array
A42MX36-3PQG100 MICROSEMI

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 		40MX and 42MX FPGA
A42MX36-3PQG100A MICROSEMI

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 		40MX and 42MX FPGA Families
A42MX36-3PQG100B MICROSEMI

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 		40MX and 42MX FPGA Families
A42MX36-3PQG100I MICROSEMI

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 		40MX and 42MX FPGA Families
A42MX36-3PQG100M MICROSEMI

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 		40MX and 42MX FPGA Families
A42MX36-3PQG208 ACTEL

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 		Field Programmable Gate Array, 1184 CLBs, 54000 Gates, 100MHz, 2438-Cell, CMOS, PQFP208, P

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