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A25L20PUQ-UF

更新时间： 2024-01-13 17:39:41

品牌	Logo	应用领域
联笙电子 - AMICC		闪存存储内存集成电路光电二极管时钟
页数	文件大小	规格书
43页	544K
描述
2Mbit / 1Mbit / 512Kbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface

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A25L20PUQ-UF 技术参数

A25L20P/A25L10P/A25L05P Series

Write Enable (WREN)

The Write Enable (WREN) instruction (Figure 4.) sets the

Write Enable Latch (WEL) bit.

The Write Enable Latch (WEL) bit must be set prior to every

Page Program (PP), Sector Erase (SE), Bulk Erase (BE) and

Write Status Register (WRSR) instruction.

The Write Enable (WREN) instruction is entered by driving

Chip Select ( ) Low, sending the instruction code, and then

driving Chip Select ( ) High.

Figure 4. Write Enable (WREN) Instruction Sequence

Instruction

DIO

High Impedance

Write Disable (WRDI)

﹣ Power-up

The Write Disable (WRDI) instruction (Figure 5.) resets the

﹣ Write Disable (WRDI) instruction completion

﹣ Write Status Register (WRSR) instruction completion

﹣ Page Program (PP) instruction completion

﹣ Sector Erase (SE) instruction completion

﹣ Bulk Erase (BE) instruction completion

Write Enable Latch (WEL) bit.

The Write Disable (WRDI) instruction is entered by driving Chip

Select ( ) Low, sending the instruction code, and then driving

Chip The Write Enable Latch (WEL) bit is reset under the

following conditions:

Figure 5. Write Disable (WRDI) Instruction Sequence

Instruction

DIO

High Impedance

(August, 2007, Version 1.0)

AMIC Technology Corp.

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型号	品牌	描述	获取价格	数据表
A25L20PU-UF	AMICC	2Mbit / 1Mbit / 512Kbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface	获取价格
A25L40P	AMICC	4 Mbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface	获取价格
A25L40PMF-50	AMICC	8 Mbit, Low Voltage, Serial Flash Memory With 50 MHz SPI Bus Interface	获取价格
A25L40PMF-50F	AMICC	8 Mbit, Low Voltage, Serial Flash Memory With 50 MHz SPI Bus Interface	获取价格
A25L40PMF-50U	AMICC	8 Mbit, Low Voltage, Serial Flash Memory With 50 MHz SPI Bus Interface	获取价格
A25L40PMF-50UF	AMICC	8 Mbit, Low Voltage, Serial Flash Memory With 50 MHz SPI Bus Interface	获取价格